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A cut sequence set-based dynamic fault tree Monte-Carlo simulation quantitative calculation method

A dynamic fault tree, quantitative calculation technology, applied in the direction of calculation, design optimization/simulation, special data processing applications, etc., can solve problems such as combinatorial explosion, not suitable for large system analysis

Inactive Publication Date: 2016-10-12
BEIHANG UNIV
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Problems solved by technology

[0004] The present invention proposes a dynamic fault tree Monte Carlo simulation quantitative calculation method based on a cut sequence set in order to solve the defect problems of existing methods in the process of dynamic fault tree quantitative calculation that are not suitable for large-scale system analysis, combined explosion, etc.

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  • A cut sequence set-based dynamic fault tree Monte-Carlo simulation quantitative calculation method
  • A cut sequence set-based dynamic fault tree Monte-Carlo simulation quantitative calculation method
  • A cut sequence set-based dynamic fault tree Monte-Carlo simulation quantitative calculation method

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Embodiment

[0067]The standard and definition of transmission delay are given in the specification of AVINC 664 full-duplex switched Ethernet (AFDX) for avionics. The total delay of the set end system includes technical delay and configuration delay, where the technical delay is independent of the traffic load, and the technical delay is defined as the end system receives and processes application data when there is no other task processing, and starts The time required for sending, and the configuration delay depends on the configuration and traffic load of the sending end, and there will be delays such as jitter due to different configurations and traffic loads, and the jitter will vary depending on the specific situation.

[0068] In the AFDX network, the data transmission process needs to go through the stages of sending end ES, channel transmission, switch store and forward, and receiving end ES. Therefore, the data delay problem is analyzed from these stages, and the events that caus...

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Abstract

The invention provides a cut sequence set-based dynamic fault tree Monte-Carlo simulation quantitative calculation method and relates to the technical field of reliability and safety (safe system engineering). The method comprises the steps of performing left-to-right depth-first traversal on different dynamic logic gates, and acquiring the minimum cut sequence set of a dynamic fault tree according to the cut sequence conversion rules of dynamic logic gates; employing the Monte-Carlo simulation method and comparing the sample failure time of events with the minimum cut sequence set, and recording a failure once if the time meets the occurrence order of events in the minimum cut sequence set and the occurrence time of the last event is within set system operation time. The method can provide important information for reliability design, improvement, enhancement and troubleshooting in engineering. The Monte-Carlo simulation is performed based on cut sequence sets, so that secondary conversion of a DFT, for example, to Markov, the Bayesian network or a failure time tree, is avoided and the quantitative calculation procedures are optimized.

Description

technical field [0001] The invention belongs to the technical field of reliability and safety (safety system engineering), and in particular relates to a dynamic fault tree Monte Carlo simulation quantitative calculation method based on cut sequence sets. Background technique [0002] With the progress of the times and the development of science and technology, various systems are developing from the initial simple series-parallel structure to comprehensive, networked, and complex. The scale of the system is increasing, and the structure and function of the system are also becoming more and more complex. The faults of these complex systems are not only reflected in the series and parallel connection, but the faults of the system have mutual influence, dependence, and timing relationship. Traditional analysis methods such as fault tree and reliability block diagram are far from satisfying the reliability analysis of this kind of system. In this regard, some scholars have pro...

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Application Information

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IPC IPC(8): G06F17/50
CPCG06F30/20
Inventor 黄宁孙利娜白亚南李心坤
Owner BEIHANG UNIV
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