High-frequency clock frequency detection structure for resisting attack chip

Abstract

The invention discloses a high-frequency clock frequency detection structure circuit for resisting an attack chip. The circuit comprises two D triggers which are connected in series and are triggered by a rising edge, three two-input AND gate, a delay unit D, an OR gate, a 10-bit asynchronous reset binary addition counter CT, a 10-bit latch and a 10-bit digital comparer DCMP. The two D triggers which are triggered by the rising edge, and the three two-input AND gate form a gate control clock structure. The delay unit D is formed by connecting the even number of phase inverters in series. Delay time is controlled by adjusting the number of the phase inverters. Two 10-bit registers, a frequency upper limit register H and a frequency lower limit register L, are contained in the10-bit digital comparer DCMP. The delay unit D or the OR gate forms a delay reset structure. An internal low-frequency clock is taken as a counting gate, the number of high-frequency clock periods is counted in fixed time, and the high-frequency clock frequency is deduced. When the obtained frequency exceeds a normal working frequency range, an alarm signal is generated.

Description

technical field [0001] The invention relates to the field of chip anti-attack, in particular to an external high-frequency clock frequency detection structure using an internal low-frequency clock as a counting threshold. Background technique [0002] In recent years, attack methods against various information systems and chips have been continuously proposed, which seriously threatens information security. With the advancement of microelectronics technology, the anti-attack technology for different attack methods is also constantly developing. Compared with software protection, the security protection technology based on the underlying hardware circuit has a higher security level, and has gradually become the first choice for information systems and chips to resist attacks. [0003] Some information security chips need to work under the drive of an external input clock, and the working speed of the internal circuit is completely determined by the clock. An attacker can at...

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Problems solved by technology

[0006] 1. Yi Qingsong, Dai Zibin; SoC Security Chip Physical Level Attack Methods and Security Protection Analysis[J], Foreign Electronic Components, 2007(5):23-26

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