Unlock instant, AI-driven research and patent intelligence for your innovation.

N type MOS (metal oxide semiconductor) tube with convex enhanced type grid substrate

A MOS tube, enhanced technology, applied in the direction of electrical components, circuits, semiconductor devices, etc., can solve the problems of poor control accuracy, small transistor gate control current, difficult to adjust, etc., to reduce leakage current, improve circuit control, shorten The effect of gate length

Inactive Publication Date: 2017-01-04
WUXI HI NANO TECH
View PDF3 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] In the prior art, the size of the MOS transistor is getting smaller and smaller. If the size of the enhanced N-type MOS transistor is too small, the gate control current of the transistor is also very small, which is not easy to adjust, and the control accuracy is very poor.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • N type MOS (metal oxide semiconductor) tube with convex enhanced type grid substrate

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0009] figure 1 It is a structural diagram of the present invention. Such as figure 1 As shown, the present invention includes a silicon substrate 1 . Both ends of the silicon substrate 1 are isolation regions 3 made of silicon oxide. There is a transition layer 2 between the isolation region 3 and the silicon substrate 1 . In the middle of the silicon substrate 1 is a polysilicon gate 5 . The bottom of the polysilicon gate 5 is convex upward. There is a layer of silicon dioxide 7 between the bottom of the polysilicon gate 5 and the silicon substrate 1 . The polysilicon gate 5 is topped by a layer of titanium polycide 6 . There are N-type doped source region 8 and drain region 4 between the polysilicon gate 5 and the isolation region 3 and inside the silicon substrate 1 . There are sidewalls 9 on both sides of the polysilicon gate 5 .

[0010] The manufacturing process of the present invention is:

[0011] Step 1, performing a boron ion implantation process on the waf...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses N type MOS (metal oxide semiconductor) tube with a convex enhanced type grid substrate, comprising a silicon substrate; both ends of the silicon substrate are isolating zones made of silicon oxide; a transition layer is arranged between the isolating zone and the silicon substrate; the middle of the silicon substrate is a polysilicon gate; the bottom part of the polysilicon gate is upwards raised; a silicon dioxide is arranged between the bottom part of the polysilicon gate and the silicon substrate; the top part of the polysilicon gate is titanium polycrystalline silicon compound; N type mixed source zone and drain zone are arranged between the polysilicon gate and the isolating zone and in the silicon substrate; both ends of the polysilicon gate are provided with side walls. In the invention, the substrate of the grid is upwards raised and can be applied to the connection and disconnection of control circuits at both sides of the circuit. The design can largely improve the circuit control and reduce leakage, and also largely shorten the gate length of a transistor.

Description

technical field [0001] The invention relates to the field of integrated circuit manufacturing, in particular to an N-type MOS transistor with a raised gate substrate. Background technique [0002] In the prior art, the size of the MOS transistor is getting smaller and smaller. If the size of the enhanced N-type MOS transistor is too small, the gate control current of the transistor is also very small, which is not easy to adjust, and the control accuracy is poor. Contents of the invention [0003] Aiming at the deficiencies of the prior art, the invention discloses an N-type MOS transistor with an enhanced gate substrate protrusion. [0004] Technical scheme of the present invention is as follows: [0005] An N-type MOS transistor with an enhanced gate substrate protruding, including a silicon substrate; two ends of the silicon substrate are isolation regions made of silicon oxide; the isolation region and the silicon substrate There is a transition layer between them; t...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/423
CPCH01L29/4232
Inventor 吕耀安
Owner WUXI HI NANO TECH