Circuit and method for improved boost control of sram write operations

Abstract

The present disclosure relates to boost control for improving SRAM write operations. The present invention provides a solution for providing write-assisted boosting for static random access memory (SRAM) arrays. A circuit includes a write driver for a static random access memory (SRAM) array. The circuit also includes a boost circuit that dynamically changes the write assist boost voltage based on a stability assist setting applied to the word lines of the array.

Description

technical field [0001] The present invention relates to semiconductor devices, and more particularly to static random access memory (SRAM) devices and methods of manufacturing the same. Background technique [0002] Static Random Access Memory (SRAM) is a type of semiconductor memory used in many integrated circuit applications, including embedded memory (eg, cache memory and register files) and external memory within general-purpose processors and application-specific integrated circuits. SRAM is an ideal memory due to its high speed, low power consumption and simple operation. Unlike dynamic random access memory (DRAM), SRAM does not require periodic refreshing to retain stored data, and its design is generally straightforward. [0003] A typical SRAM cell contains a pair of cross-coupled inverters for holding the desired data bit value (ie, 1 or 0) and the complement of that value. While SRAM is an ideal memory, it is known that if not properly designed and manufactured...

AI Technical Summary

Problems solved by technology

One specific technique used to improve stability is to lower the wordline potential during write operations; however, this lowering of the wordline potential can adversely affect writability

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