Missing perception-based heterogeneous multi-core cache replacement method

A cache replacement and heterogeneous multi-core technology, applied in memory systems, instruments, electrical digital data processing, etc., can solve problems such as frequent access to caches, and achieve the effect of improving overall performance

Active Publication Date: 2017-02-08
BEIJING UNIV OF TECH
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  • Abstract
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AI Technical Summary

Problems solved by technology

[0005] There are different access characteristics for GPU and CPU in memory access. The most important point is that GPU applications contain a large number of threads, which leads to GPU applications accessing the cache more frequently than CPU applications.

Method used

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  • Missing perception-based heterogeneous multi-core cache replacement method
  • Missing perception-based heterogeneous multi-core cache replacement method
  • Missing perception-based heterogeneous multi-core cache replacement method

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Embodiment Construction

[0038]In order to make the purpose, technical solutions and advantages of the present invention more clear, the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0039] The present invention relates to a heterogeneous multi-core cache replacement algorithm based on lack of awareness. Taking a heterogeneous processor with two CPU cores and four GPU cores, each of which has its own L1Cache but shares one L2Cache, as an example, like figure 1 shown. The running CPU test program is single-threaded SPEC CPU2006, and the GPU application program is Rodinia. Each workload consists of a CPU test program and a GPU application program. In the simulator, the conformance protocol used is: X86_VI_hammer_GPU. In this protocol, the CPU and GPU have their own L1Cache and jointly access the L2Cache.

[0040] The present invention provides a heterogeneous multi-core cache replacement method based on missing perception. Fir...

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Abstract

The invention discloses a missing perception-based heterogeneous multi-core cache replacement method. The method comprises the steps of firstly, in a heterogeneous multi-core structure, realizing an LRU cache replacement algorithm and an LFU cache replacement algorithm in a Ruby mode; secondly, dynamically performing switching between the LRU and LFU replacement algorithms by comparing values of missing numbers of the two replacement algorithms dynamically in real time; and finally, modifying a highest position stored in a cache queue by default during cache block replacement or just access in a cache replacement algorithm used by a GPU application, and lowering a priority value of a cache block during the access of the GPU application for one. By adopting the technical scheme, the cache utilization rate is increased and the system performance is improved.

Description

technical field [0001] The invention belongs to the field of computer architecture cache system structure, and in particular relates to a missing-aware-based heterogeneous multi-core cache replacement method. Background technique [0002] The advent of the big data era has brought new challenges to massive data processing. The traditional multi-core architecture is difficult to meet the needs of large-scale computing. The combination of GPU and CPU on the chip is a trend to ease the pressure of large-scale computing. The industry forms a heterogeneous multi-core processor architecture by integrating different types of processors on the same chip. In the CPU-GPU heterogeneous system, the CPU is mainly responsible for performing serial tasks and logic control, and the GPU has great advantages in parallel computing. By integrating different types of processors on the chip and giving full play to their respective application scenarios The performance advantages under the follow...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/123G06F12/122
CPCG06F12/122G06F12/123
Inventor 方娟范清文郝晓婷刘士建
Owner BEIJING UNIV OF TECH
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