Failure analysis method for semiconductor structure
A failure analysis, semiconductor technology, applied in the analysis of materials, material analysis by optical means, preparation of test samples, etc., can solve the problems of complex thin slices in the preparation process
Inactive Publication Date: 2017-03-15
PEKING UNIV FOUNDER GRP CO LTD +1
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Problems solved by technology
The sample preparation process in this method is quite complicated, and the thickness of the thin slices also has certain strict requirements.
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[0044] In order to make the objectives, technical solutions and beneficial effects of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, but not to limit the present invention.
[0045] figure 1 A schematic diagram of a semiconductor structure including multiple types of MOS transistors to which the embodiments of the present invention are applied is exemplarily shown. like figure 1 As shown, the semiconductor structure includes a substrate 101 , a dielectric layer 106 , a gate electrode 105 , a metal layer 107 , and a passivation layer 108 in sequence from the bottom to the top. Wherein, the substrate of the semiconductor structure includes a plurality of MOS transistors of different types. The substrate 101 includes a doped region, the doped region inc...
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The embodiment of the invention relates to the technical field of semiconductors and particularly relates to a failure analysis method for a semiconductor structure. A structural shape of the semiconductor structure is displayed by virtue of a simple method, and the failure analysis is carried out on the semiconductor structure according to the structural shape. According to the embodiment, the analysis method comprises the following steps: soaking a to-be-observed semiconductor into a pretreatment solution for a first time length so as to expose doping regions of the to-be-observed semiconductor, and soaking the to-be-observed semiconductor with the exposed doping regions in a staining solution for a second time length, wherein the staining solution comprises 49% of hydrofluoric acid, 70% of nitric acid and glacial acetic acid, wherein 49% of hydrofluoric acid, 70% of nitric acid and glacial acetic acid are in a volume ratio of 1 to 20 to 7; and determining the effective doping surface of each doping region of the stained to-be-observed semiconductor, and determining whether each doping region of the to-be-observed semiconductor is effective. Therefore, the doping regions can be stained by virtue of a soaking process, then the failure analysis of the stained semiconductor can be realized, and the operation is convenient and simple.
Description
technical field [0001] Embodiments of the present invention relate to the technical field of semiconductors, and in particular, to a method for failure analysis of semiconductor structures. Background technique [0002] Metal-Oxid-Semiconductor (MOS) transistors are the most commonly used basic semiconductor devices in integrated circuits, because MOS transistors have low power consumption, easy integration, and good process controllability. Semiconductors composed of MOS transistors include various types, such as semiconductors composed of a single type of MOS transistors, and semiconductors composed of multiple types of MOS transistors. Doping regions are formed in semiconductor substrates by doping ion implantation. [0003] Semiconductor failure is usually caused by the failure of the doped region of the semiconductor. Therefore, in the prior art, the morphology of the doped region is usually revealed through a certain technology, and the failure of the semiconductor st...
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IPC IPC(8): G01N1/30G01N1/32G01N21/84
Inventor 曹婷
Owner PEKING UNIV FOUNDER GRP CO LTD