A kind of semiconductor device and its preparation method, electronic device

Abstract

The invention relates to a semiconductor device, a preparation method therefor, and an electronic device. The method comprises the steps: S1, providing a semiconductor substrate, and carrying out the trench immobile ion implantation of the semiconductor substrate; S2, patterning the semiconductor substrate, so as to form a plurality of fins at intervals; S3, forming a protection layer on the fins; S4, depositing an isolation material layer so as to cover the fins, carrying out the back etching of the isolation material layer so as to expose a part of fins and form the fins with the target height; S5, executing diffusion immobile ion implantation in the isolation material layer, so as to prevent the diffusion of trench immobile ions. A device prepared through the method can improve mismatching performances, caused by the lateral diffusion and implantation of NMOS trench immobile ions, of an SRAM device. Through the improvement of the method provided by the invention, the performance and yield of the semiconductor device is further improved.

Description

technical field [0001] The present invention relates to the field of semiconductors, in particular, the present invention relates to a semiconductor device, a preparation method thereof, and an electronic device. Background technique [0002] With the continuous development of semiconductor technology, the improvement of integrated circuit performance is mainly achieved by continuously shrinking the size of integrated circuit devices to increase its speed. At present, due to the demand for high device density, high performance, and low cost, the semiconductor industry has advanced to the nanotechnology process node, and the fabrication of semiconductor devices is limited by various physical limits. [0003] As the size of CMOS devices continues to shrink, the short-channel effect has become a key factor affecting device performance. Compared with existing planar transistors, FinFETs are advanced semiconductor devices used for 20nm and below process nodes, which can effective...

AI Technical Summary

Problems solved by technology

[0005] First of all, the first one is to perform channel stop ion implantation after fin formation, the main problem is damage to fins, especially for NMOS, where NMOS punch-through is more serious than PMOS, mainly because NMOS punch-through is done with B or BF 2 , while PMOS uses AS; B ions are relatively easy to lose (LOSS)

[0006] Another process is to perform channel stop ion implantation before fin formation, which also affects the performance of SRAM due to the impact of lateral diffusion

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