Microelectronic device nanometer interface bonding layer thermal resistance analyzing method

A technology of microelectronic devices and analysis methods, which is applied in the fields of instruments, electrical digital data processing, and special data processing applications, etc., can solve problems such as the inability to test the thermal resistance of the bonding layer at the nanometer interface, achieve improved bonding quality, and achieve accurate characterization , Improve the effect of heat dissipation

Active Publication Date: 2017-05-17
NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD
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Problems solved by technology

[0004] The present invention proposes a method for analyzing the thermal resistance of the nano-interface bonding layer of a microelectronic device. The structural design of the layer sample is to meet the combination of laser flash test and thermal resistance numerical analysis, and realize the accurate characterization and quantitative analysis of the thermal resistance of the nano-scale interface layer, in order to improve the bonding quality of microelectronic devices and enhance their heat dissipation. The ability provides the basis for test analysis, solves the problem that the existing test methods cannot test the thermal resistance of the nano-interface bonding layer inside the microelectronic device, realizes the quantitative analysis of the thermal resistance of the nano-scale bonding layer, and contributes to the improvement of microelectronics The bonding quality of the device and the improvement of its heat dissipation capability provide the basis for test analysis

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  • Microelectronic device nanometer interface bonding layer thermal resistance analyzing method
  • Microelectronic device nanometer interface bonding layer thermal resistance analyzing method
  • Microelectronic device nanometer interface bonding layer thermal resistance analyzing method

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Embodiment

[0023] Thermal resistance analysis of benzocyclobutene (BCB) interfacial layer for wafer-level silicon-silicon bonding in microelectronic MEMS devices:

[0024] ①According to the actual size of the MEMS device wafer-level silicon-silicon bonded benzocyclobutene interface layer, design a three-layer test structure: Si-BCB-Si, the thickness of the upper silicon layer and the thickness of the lower silicon layer are equal to h u = h d =0.48mm, the thickness of the BCB nano bonding layer is 100nm; the test sample is prepared according to the design, and its plane size is Φ=12.7±0.05mm;

[0025] According to the design of Si-BCB-Si, the grid of the thermal resistance during the flash method test is carried out, that is, the heat in the heat transfer process first passes through the thermal resistance , and then through the thermal resistance , and finally through the thermal resistance , is a three-layer thermal resistance series structure, and the total thermal resistance ...

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Abstract

The invention relates to a microelectronic device nanometer interface bonding layer thermal resistance analyzing method. The microelectronic device nanometer interface bonding layer thermal resistance analyzing method includes the following steps of (1) designing and preparing laser flash testing samples containing nanometer interface bonding layers, ad gridding the thermal resistance of the samples; (2) obtaining the thermal diffusion coefficient of the overall samples through the laser hot flash method, calculating the thermal resistance by combining thermal resistance equation values; (3) extracting nanometer interface bonding layer thermal resistance through gridded thermal resistance analysis. The microelectronic device nanometer interface bonding layer thermal resistance analyzing method has the advantages of solving the problem that existing test method cannot achieve thermal resistance testing of internal nanometer interface bonding layers of microelectronic devices, achieving combination of laser flash testing and thermal resistance value analysis through interface layer sample-contained structural design to further achieve precise representation of nanoscale interface layer thermal resistance, and achieving quantitative analysis on the nanoscale bonding layer thermal resistance of the microelectronic devices to provide testing and analyzing basis for improving the bonding quality and the heat dissipating capacity of the microelectronic devices.

Description

technical field [0001] The invention relates to a method for analyzing the thermal resistance of a nano-interface bonding layer of a microelectronic device, which is mainly applied to the research on the thermal characteristics of the nano-scale bonding layer of an electronic device. Background technique [0002] With the development of microelectronic devices towards systematization, integration, high power, and miniaturization, the heat flux inside the components continues to increase, which in turn leads to a decline in the performance and reliability of components. Studies have shown that about 55% of electronic components fail Mainly due to overheating and heat related issues. Therefore, the heat dissipation capability of components is becoming more and more important. As an important part of component packaging, the quality of the bonding layer and the dielectric material seriously affect the heat dissipation capability of the device. Especially in high-power-based d...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
CPCG06F30/17G06F30/333
Inventor 郭怀新吴立枢孔月婵陈堂胜
Owner NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD
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