Method for predicting and quantifying binary charge redistribution type successive approximation analog-to-digital converter

A charge redistribution, analog-to-digital converter technology, applied in the direction of analog/digital conversion, energy-saving methods, code conversion, etc., can solve the problems of power consumption increase, speed limit, quantization power consumption, etc., to achieve low power consumption Design, reduce the number of comparisons, and reduce the effect of quantization power consumption

Inactive Publication Date: 2017-07-28
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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Problems solved by technology

But it has a defect that the quantization power consumption of the higher frequency part of the signal is large, and the maximum number of comparisons can r

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  • Method for predicting and quantifying binary charge redistribution type successive approximation analog-to-digital converter
  • Method for predicting and quantifying binary charge redistribution type successive approximation analog-to-digital converter
  • Method for predicting and quantifying binary charge redistribution type successive approximation analog-to-digital converter

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Embodiment Construction

[0042] Such as figure 1 Shown is a system block diagram of a binary charge redistribution type successive approximation analog-to-digital converter applicable to the present invention, including: a digital-to-analog converter module DAC, a comparator module, a SAR logic control circuit module and a predictive judgment control circuit module including a memory, The digital-to-analog converter module DAC consists of at least one set based on the common-mode voltage V cm Composed of reset capacitor arrays, the control terminal of the digital-to-analog converter module DAC is coupled to the output terminals of the SAR logic control circuit module and the prediction and judgment control circuit module; all quantized capacitors in each capacitor array are numbered, denoted as C i , i is any integer from 1 to N-1, C 1 is the highest bit capacitance, where N is the number of digits of the binary charge redistribution successive approximation analog-to-digital converter, and each capa...

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Abstract

The invention relates to a method for predicting and quantifying a binary charge redistribution type successive approximation analog-to-digital converter, and belongs to the technical field of analog-to-digital conversion. According to the method provided by the invention, a high P bit code of a previous quantification result is directly loaded in the quantification result of the present high P bit based on a common mode voltage reset structure capacitor array DAC, a prediction result is judged according to twice switching results before and after the switching of a redundant capacitor, the comparison of the residual low bits can be carried out in the case of prediction correctness, the capacitance of a lower polar plate of the high P bit is reset in the case of a prediction error, and the traditional quantification from the most significant bit to the least significant bit (MSB_First) is carried out again. By adoption of the method provided by the invention, the switching frequency of a digital-to-analog converter module and the comparison times of a comparator are maximally reduced, the average quantification power consumption of the low and medium frequency portions of signals are greatly reduced, and a low power consumption design is realized; and the method provided by the invention can be used as a feature parameter extraction means of electrocardiogram (ECG), electroencephalogram (EEG) and other biological medical signals so as to extract extreme values and frequency characteristics of target signals under extremely low power consumption.

Description

technical field [0001] The invention belongs to the technical field of analog-to-digital conversion, and in particular relates to an analog-to-digital converter prediction technology and its application in extracting characteristic parameters of biomedical signals. Background technique [0002] Analog signals in real life often have the characteristics of long-term small fluctuations, periodic changes, different bands, peak points and valley points, such as bioelectrical signals, sensor detection signals, etc. In the frequency spectrum, the mid-low frequency components of such signals are often very large. The MSB-First algorithm of the traditional successive approximation analog-to-digital converter first compares, then gives the prediction interval, and continuously narrows the range of the prediction interval to obtain the final quantization result. Its disadvantage is that even if the signal amplitude of the two samples before and after the change is very small, each qu...

Claims

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Application Information

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IPC IPC(8): H03M1/00H03M1/38A61B5/04
CPCA61B5/24A61B5/30H03M1/002H03M1/38
Inventor 李靖彭霞王岑张中宁宁
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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