4 results about "Quicksort" patented technology

The application discloses a kind of fast star map identification method and system based on adaptive star table, which comprises the following steps: using block, hierarchical extraction method to generate GAIA star table file from original GAIA star table data;GAIA star table file and Tycho2 star table file are read into memory, and star information is stored in partition, and star table index is established;The field of view information of input optical image is input, and according to the input information, the type of star table to be used is selected;According to the pointing and field of view information of input optical image, the required star information is read according to the star table index;Fast sorting method is used to sort image stars and star table stars, and the brightest multiple stars are selected for fast star table matching;Through the voting of matching result, the star mapping with the highest matching accuracy is found out as the successfully identified star.The application is suitable for optical image processing research field, and can be used for fast astronomical positioning of space debris and near-earth asteroids, to gain valuable time for emergency response of space events.

The application relates to an FPGA chip data sorting method, an FPGA chip and electronic equipment. The FPGA chip is in communication connection with an extended memory, and the method comprises the following steps: obtaining to-be-sorted data, and writing the to-be-sorted data into the memory; reading the to-be-sorted data in the memory; respectively performing single sorting on the to-be-sorted data according to a preset sorting number; and outputting sorted ordered data in a specified range each time after each single sorting is completed. According to the scheme, the FPGA chip can be combined with the memory, the memory is used to cache to-be-sorted data, the problem of insufficient on-chip caching resources of the FPGA is solved, and therefore, fast sorting of a large amount of data in the FPGA chip is realized. The FPGA implementation logic of the method is simple, the sorting time consumption is less, and the stability of sorting is high.

This invention discloses a method for triggering the readout of time-out-of-order data. The method involves selecting the total depth of the integrated hardware cache, dividing the cache unit into multiple cache partitions, and mapping each cache partition to a corresponding time span on the time axis. Based on the mapping relationship between cache partitions and time spans, the cache partition corresponding to the current data is determined, and the time-out-of-order data is reordered within the cache. A global time counter is constructed based on the system clock, and the time range for triggering the readout is obtained based on the delay, offset, and trigger window information of the system-transmitted trigger signal. Based on the mapping relationship between cache partitions and time spans, the cache partition range corresponding to the time range for triggering the readout is determined in reverse. The time information in the data is compared with the time range for triggering the readout, and all data that meets the time range is selected. This method enables rapid sorting of time-out-of-order data, thereby improving the triggering readout speed while reducing cache capacity and hardware complexity.