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Method for detecting a thinning of the semiconductor substrate of an integrated circuit from its back face and corresponding integrated circuit

A technology of integrated circuits and semiconductors, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve the problem of increased attack efficiency and achieve the effect of easy implementation

Active Publication Date: 2017-08-29
STMICROELECTRONICS (ROUSSET) SAS
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The efficiency of this attack is increased when the substrate of the integrated circuit is thinned by the perpetrator from its backside in such a way as to be as close as possible to the components of the integrated circuit formed on its front side

Method used

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  • Method for detecting a thinning of the semiconductor substrate of an integrated circuit from its back face and corresponding integrated circuit
  • Method for detecting a thinning of the semiconductor substrate of an integrated circuit from its back face and corresponding integrated circuit

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Embodiment Construction

[0022] exist figure 1 In the reference numeral IC designates an integrated circuit comprising, for example, a semiconductor substrate SB of P-type conductivity, comprising at least one insulating region RIS of, for example, Shallow Trench Isolation (STI) type, which in the example shown here is located with On top of the well CS of the N conductivity type.

[0023] The top surface (or front side) FS of the substrate is covered by an etch stop layer 1 (CESL layer), typically silicon nitride SiN. This layer 1 is covered by a dielectric layer 2, usually marked by the abbreviation PMD by those skilled in the art, which separates the etch stop layer 1 from the first metallization layer M1 of the interconnecting part of the integrated circuit, the first metallization layer M1 of the interconnecting part of the integrated circuit. A metallization layer M1 is generally denoted by those skilled in the art by the abbreviation BEOL (for back end of line).

[0024] In order to be able t...

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Abstract

The invention discloses a method of detecting a dilution of the semiconductor substrate of an integrated circuit from the rear thereof, comprising measuring a physical quantity representative of the resistance between the ends (EX11, EX21) of two electrically conductive contacts (C1, C2) and an underlying substrate region (CS), the two electrically conductive contacts (C1, C2) extending at least partially in this insulation region (RIS).

Description

technical field [0001] The present invention relates to integrated circuits, and more particularly to detection of potential thinning of integrated circuit substrates from their backsides. Background technique [0002] Integrated circuits, especially those equipped with memories containing sensitive information, must be protected as much as possible against attacks, especially those designed to discover stored data. [0003] A possible attack can be achieved, for example, by a focused ion beam (FIB—Focused Ion Beam) by means of a laser beam. [0004] The efficiency of the attack increases when the substrate of the integrated circuit is thinned from its backside in such a way by the perpetrator to be as close as possible to the components of the integrated circuit formed on its frontside. SUMMARY OF THE INVENTION [0005] According to one embodiment and its implementation, there is thus provided a method for detecting possible thinning of the substrate of an integrated cir...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/66H01L21/28H10B69/00
CPCH01L21/28H01L22/14H01L22/34G06F21/87H01L21/76898H01L21/823475H01L21/76829H10B69/00G11C16/22H01L21/31116H01L21/74H01L21/823481H01L21/823892H01L23/57H01L23/576H01L29/7846
Inventor P·弗纳拉C·里韦罗
Owner STMICROELECTRONICS (ROUSSET) SAS
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