A kind of array substrate and its manufacturing method

The technology of an array substrate and a manufacturing method, which is applied in the field of display panels, can solve problems such as disconnection of metal layers or conductive layers, poor display effects, and poor flatness of alignment films, so as to reduce production costs, prevent corrosion, and improve surface flatness Effect

Active Publication Date: 2020-03-24
SHANGHAI TIANMA MICRO ELECTRONICS CO LTD
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0005] In view of this, the present invention provides an array substrate and a manufacturing method thereof, which can solve the problem of disconnection of the metal layer or the conductive layer caused by the poor flatness of the alignment film caused by the third metal layer and the large slope of the via hole.

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  • A kind of array substrate and its manufacturing method
  • A kind of array substrate and its manufacturing method
  • A kind of array substrate and its manufacturing method

Examples

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Embodiment Construction

[0041] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that the relative arrangements of components and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.

[0042] The following description of at least one exemplary embodiment is merely illustrative in nature and in no way taken as limiting the invention, its application or uses.

[0043] Techniques, methods and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, such techniques, methods and devices should be considered part of the description.

[0044] In all examples shown and discussed herein, any specific values ​​should be construed as exemplary only, and not as limitations. Therefore, other instances of the exemplary embodiment may have dif...

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Abstract

The invention provides an array substrate and a preparation method thereof. The array substrate comprises an underlay substrate, a thin film transistor layer located at one side of the underlay substrate, a flattening layer and a third metal layer. The thin film transistor layer comprises a gate metal layer, a first insulation layer, an active layer and a source and drain metal layer which are arranged in sequence. The gate metal layer and the source and drain metal layer are arranged at the side of the flattening layer close to the underlay substrate. The third metal layer is arranged at the side of the flattening layer away from the underlay substrate. A groove is arranged on the flattening layer at a position corresponding to the third metal layer. The third metal layer is formed in the groove. According to the array substrate and the preparation method thereof provided by the invention, the third metal layer is arranged in the groove on the flattening layer, the section difference between the position of the third metal layer on a rubbing film layer and other position is reduced or eliminated, the surface flatness of rubbing film is improved, the uniformity of the rubbing is improved, and the final display effect is optimized.

Description

technical field [0001] The present invention relates to the technical field of display panels, and more particularly, to an array substrate and a manufacturing method thereof. Background technique [0002] Prior art array substrates such as figure 1 As shown, the array substrate is sequentially provided from bottom to top: a base substrate 101, a thin film transistor layer on one side of the base substrate, a planarization layer 102, a third metal layer 103, a via hole 104, a film layer 105 and alignment membrane 106 . The third metal layer 103 is directly laid on the side of the planarization layer away from the thin film transistor layer, and a film layer 105 is laid on the planarization layer and the third metal layer. The film layer 105 may include: a pixel electrode layer, a common electrode layer and a The insulating layer between the film layers; due to the step difference between the third metal layer 103 and other positions, when the alignment film 106 is finally ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/12H01L21/84
CPCH01L27/1244H01L27/1288
Inventor 许传志谢正芳汪梅林
Owner SHANGHAI TIANMA MICRO ELECTRONICS CO LTD
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