Monitoring-point deviation adjustment circuit based on semi-path time sequence early-warning method and method

Abstract

The invention discloses a monitoring-point deviation adjustment circuit based on a semi-path time sequence early-warning method. The monitoring-point deviation adjustment circuit is composed of a monitoring-point-deviation-ratio detection module and a clock-duty-ratio adjustment module. The monitoring-point-deviation-ratio detection module detects a critical-path start point, a monitoring point and delay of a tail end point and the critical-path start point through a TDC, and the result is shown through the output stage number of the TDC; the TDC transmits an output signal to an ACU, then the calculated monitoring-point deviation ratio is compared with a threshold value through the ACU, and when the monitoring-point deviation ratio is larger than the threshold value, the adjusting signal of the clock duty ratio is pulled up. The clock-duty-ratio adjustment module increases the clock duty ratio step by step when the adjusting signal of the clock duty ratio is pulled up till a time sequence early-warning signal is pulled down; the clock duty ratio is stopped to be adjusted at this moment, and power consumption benefits lost by the path monitoring-point deviation are finally reduced.

Description

technical field [0001] The invention relates to a monitoring point deviation adjustment circuit based on the half-path timing early warning method. The circuit can be used for calibration after the monitoring point is inserted in the half-path timing early warning method, and is used to reduce the power consumption loss caused by the monitoring point insertion after the deviation. The whole circuit is realized by pure digital logic, which belongs to the field of integrated circuit design. technical background [0002] In the traditional circuit design process, in order to cope with the circuit changes in the worst case, the designer usually chooses the worst case as the design condition of the chip. The "worst case" comprehensively considers the voltage jitter and temperature fluctuation that may exist in the circuit. , gate length, doping fluctuations, coupling noise and other adverse effects of various parameter fluctuations, but these adverse timing deviation factors are ...

AI Technical Summary

Problems solved by technology

However, the difficulty brought about by half-path monitoring is that it is difficult to ensure that the monitoring point is inserted exactly in the half of the critical path, that is, the monitoring point will be biased

The back of the monitoring point will reduce the power consumption gain of the adaptive circuit, so this problem needs to be solved

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