367 results about "Stage number" patented technology

A unequal protection hybrid automatic retransfer request method based on equality and un-equality constellation diagram mapping, it is used in MQAM communication system with which the stage numbers is M and M=2, the modulation mapping of sending end and the resolving mapping of receiving end adopt constellation diagrams that have same distribution, in the first transmission and anterior m/2-1 time retransmission, adopts equality constellation diagram, at the m/2 time and the latter retransmission adopts un-equality constellation diagram, provides higher error protection for two most significant bit in the modification symbol; the bits un-equality protection in the modification symbol of sending end reset; uses m/2 reset and opposite reset rules, at different retransmission time adopts circularly in turn, achieves alternative protecting the bits in modulation symbol; the bits in modulation symbol of receiving end reset oppositely. Reset oppositely the bits according to the reset rules of sending end, recover it into bits sequence soft value before sending end bits resetting. It promotes the signals S/N of combining soft value after demodulating and resolving mapping at receiving end, reduces efficiently grouping retransmission time, makes the output of system maximum.

The invention relates to a time domain self-adaptive balancer, wherein input signal flows to a forward filter which output flows into an input of an adder, another two inputs of the adder is the output of a first feedback filter and the output of a second feedback filter, the adder adds the input signals, which output is connected with the input of a judger, an error generator according to the input and output of the judger generates an error signal, a tapping factor refresher according to the error signal generates a tapping factor to refresh the tapping factor of the forward filter and the judgment feedback filter. The first feedback filter uses a rotary structure, and the second feedback filter uses a non-rotary structure, which input has some time delay relative to the input of the first feedback filter. The stage numbers of the rotary structure and non-rotary structure are decided according to the length of last path.

The invention belongs to the field of logistics storage, and particularly relates to a cargo processing method and system in the logistics storage field. By means of the method and system, the commodity sorting efficiency can be improved, and sufficient inventories are guaranteed for sorting zones for cargo delivering. The cargo processing method in the logistics storage field is characterized bycomprising the steps that a warehouse is divided into n zones, and all zones correspond to different stock day numbers; each zone is divided into a storing zone and a sorting zone which are separated,each storing zone is provided with different-stage storing sub zones, each sorting zone is provided with different-stage sorting sub zones, and the total stage number of the storing sub zones is equal to the total stage number of sorting sub zones; the area proportion of the sorting sub zones of each zone is measured; the stages of cargoes to be put are determined, and the total number of the stages of the cargoes to be put is equal to the total number of the stages of the sorting sub zones; and the cargoes to be put are put into the sorting sub zones or storing sub zones with corresponding stages and stock day numbers according to the stages and stock day numbers of the cargoes.

The invention discloses a GPU thread scheduling optimization method. The GPU thread scheduling optimization method includes the steps of numbering thread blocks, mapping the thread blocks to SMs with a hash method, assigning different priority levels to the thread blocks in the same SM, dividing warps in the blocks into groups with fixed sizes according to the stage number of a flow line, and scheduling the warps in the groups, the groups and the blocks with a round-robin method. According to the better GPU thread scheduling optimization method, the problem that all the warps reach the same long delay operation in the same time is solved, through the strategy of warp three-stage scheduling, FU period idling caused by long delay operation is alleviated to some degree, and the use ratio of GPU computing resources is improved.

The invention relates to the technical field of oil and gas field fracturing and provides an unlimited layer fracturing process, which comprises the following steps: manufacturing a fracturing process pipe column, connecting a guiding plug, a seal ball seat, a first-stage unlimited layer fracturing sliding sleeve, a packer, a pipe column telescopic compensator, a second-stage unlimited layer fracturing sliding sleeve, a packer, a pipe column telescopic compensator to an n-stage unlimited layer fracturing sliding sleeve, a packer with a hanger from bottom to top in sequence into a single pipe column; delivering the single pipe column to a position to be sealed; sealing all the packers at a time; then sealing the hanger; throwing a first-stage ball arm or a ball; opening the first-stage unlimited layer fracturing sliding sleeve; fracturing a first layer; throwing a second-stage ball arm or a ball; opening the second-stage unlimited layer fracturing sliding sleeve; fracturing a second layer and the like until opening the n-stage unlimited layer fracturing sliding sleeve and fracturing an n layer, wherein n is a fracturing stage number. The unlimited layer fracturing process has the advantages that the pipe column has a simple structure, the fracturing construction period is short, the fracturing stage number is unlimited and the reliability is high.

The invention discloses an electric-hydraulic dual-control energy storage type fracturing well completion switch. The electric-hydraulic dual-control energy storage type fracturing well completion switch comprises an upper joint, a center pipe, a pressure transmission outer tube, a slide sleeve outer tube, an outer sheath and a lower joint which are sequentially connected from top to bottom, wherein an energy storage device is arranged on the center pipe; a slide sleeve system is arranged inside the slide sleeve outer tube; a hydraulic transmission system is arranged inside the slide sleeve outer tube and the outer sheath; each of the center pipe, the pressure transmission outer tube and the slide sleeve outer tube is provided with communicated pressure transmission holes; and the energy storage device, the slide sleeve system and the hydraulic transmission system are communicated through the pressure transmission holes. A control driving system is also arranged between the lower half part of the slide sleeve outer tube and the outer sheath. The electric-hydraulic dual-control energy storage type fracturing well completion switch solves the problems that during the conventional ball injection slide sleeve staged fracturing, due to the existence of a ball seat, the layering stage number is limited; the oil well yield is influenced; and the late-period control production and the selective production cannot be realized, and the like.

The invention relates to a waste acid concentration multistage treatment method which comprises the following steps of: heating 20-22% waste acid by a preheater, evaporating by a one-effect evaporation heater and a double-effect evaporation heater, cooling by a cooler and crystallizing by a crystallizer; heating by a triple-effect evaporation heater and separating by a separator to obtain 65% concentrated acid. The secondary steam part is used as a heat source part of the next stage heater and is condensed by spraying cooling water, wherein the one-effect evaporation heater and the double-effect evaporation heater are falling film graphite tube array evaporation heaters; the triple-effect evaporation heater is a floating head tube array graphite heat exchange. The water evaporation capability of the method is increased from 2.5 tons to 10 tons, and the stage number is 3 or more. A large amount of steam and cooling water is saved, and the pollution to the environment is reduced. The heat exchange area of equipment is reduced by 30%, and materials are saved and manufacturing cost is reduced correspondingly. The heat of steam is fully utilized, more than 35% of steam is saved, and more than 30% of cooling water can be saved. The condensed water part of the steam is used as the hear source part of the preheater and is recycled for other uses.

The invention provides a multi-way asymmetrical Doherty amplifier, which comprises a multi-way power splitting network circuit, a carrier amplifier, at least two peak amplifiers and an output power combination and impedance conversion network circuit. An input end of the carrier amplifier and input ends of the peak amplifiers are respectively connected with the multi-way power splitting network circuit, and an output end of the carrier amplifier and output ends of the peak amplifiers are respectively connected with the output power combination and impedance conversion network circuit. In the peak amplifiers, the power of the first peak amplifier is 0.7-1.3 times of that of the carrier amplifier, and the power of the other peak amplifiers is doubled gradually with the doubling coefficient ranging from 1.5 to 2.5. When GSM (global system for mobile communication) multi-carrier signals with the peak-to-mean ratio of 7dB are output while the circuit of a three-way asymmetrical Doherty amplifier returns by 7dB, the efficiency can be over 56%, and higher peak-to-mean ratio and efficiency requirements can be met along with increase of the stage number of the peak amplifiers.

A semiconductor memory device includes a replica circuit including a plurality of replica cells (RMC) having the same elements as those of memory cells in a memory array and outputting signals with levels in the stage number to a common replica bit line, and a sense amplifier control circuit for receiving a signal of the replica bit line to control a timing of a signal SAE for starting a sense amplifier circuit. The replica circuit includes a switching circuit (SW) for switching the stage number of the replica cells to be activated among the plurality of replica cells in a programmable manner.

The invention relates to an efficient low-profile wide-axis ratio bandwidth large-scale circularly-polarized array antenna, in particular to a circularly-polarized array antenna composed of a metal floor with a coupling gap, a thin film printed with radiation patches and sequential rotating microstrip feed networks, a main feed network and a foam or hollow dielectric plate for supporting the thinfilm. Each four sequentially and rotarily-placed corner cut radiation metal patches and one sequential rotating microstrip feed network together form a sub array, coupling with the main feed network through the gap on the metal floor is carried out, sequential 90 DEG-difference equal-amplitude excitation of each sub array element is carried out, and thus, wide-axis ratio bandwidth circularly-polarized radiation is realized. Through increasing the stage number of the power divider and the number of sub arrays of the main feed network, a large-scale circularly-polarized array antenna can be constructed. In comparison with the existing circularly-polarized array antenna technology, the efficient low-profile wide-axis ratio bandwidth large-scale circularly-polarized array antenna has the advantages of wide axis ratio bandwidth, simple structure, high radiation efficiency, low profile, light weight, low cost and easy expansion to a large-scale array, and is especially suitable for mobile terminals and satellite terminals.

The invention discloses a high acid-value grease depickling novel technology. The technology of the invention applies advanced molecular distillation technique to high acid-value grease depickling and can separate the grease from the fatty acid better on the basis of not damaging the original compositions of the raw material so as to reduce the oil acid-value; furthermore, the depickling effect can be improved by multi-stage serial connection and the continuous operation can be carried out. The acidified oil is dehydrated by fine filtration, saturated NaCl water washing and film braising and is pumped into a first-stage molecular distiller by a first-stage delivery pump so as to distil part of fatty acid; the distilled residue in the first-stage is taken as the raw material of the second-stage molecular distiller and pumped into the second-stage molecular distiller by a second-stage delivery pump so as to distil the residual fatty acid; the distilled residue is taken as the raw material of the third-stage; the circulation is repeatedly to the required N-stage; wherein, N is more than or equal to 2 and less than or equal to 5; the best stage number is 3 or 2. The technology of the invention has the advantages that the fatty acid is separated; meanwhile, the raw material composition of the grease is not damaged; the distilled high-quality fatty acid has extremely high application value by the further disposal; furthermore, multi-stage molecular distilling is beneficial to the continuous operation so as to complement the shortages of single-stage separation capability, thus providing beneficial conditions for the industrialization in large scale.

The invention belongs to the technical field of oil production engineering, and particularly relates to a drilling-plug-free pumping-in hydraulic bridge plug staged fracturing method. The method comprises the following steps of (1) drifting; (2) first-stage perforation and fracturing; (3) large-drift-diameter bridge plug and perforation tool string pumping; (4) ground ignition setting on a large-drift-diameter bridge plug; (5) gradual and upward lifting of cables according to the second-stage perforation section position, and grading ignition perforation; (6) perforation tool string pulling out; (7) fracturing; (8) repeated and sequential bridge plug installation, perforation and ball fracturing on the rest layer sections until the completion of all layer section fracturing operation; (9) soluble ball dissolution (at the moment, the drift diameter of a pitshaft is identical to that of a center pipe of the bridge plug); (10) open flow, finding production and well completion. The method provided by the invention has the characteristics that the packing is reliable, the partial pressure stage number is not limited, the grading perforation positioning is accurate, the bridge plug drilling and grinding is not needed, the construction efficiency is high, the cost is low, and the goal of staged fracturing of a horizontal well can be achieved.

A digital frequency measuring apparatus includes a frequency divider dividing an input frequency signal and providing a divided frequency signal; a period counter counting clock cycles in a period of the divided frequency signal using a clock signal and providing a period count value for each period; and a digital filter amplifying the period count value using an accumulated gain, converting an amplified period count value into a frequency, and providing a first digital output value. The digital filter determines the accumulated gain using a predetermined stage number and a predetermined decimator factor.

The invention provides a method for establishing a wind-driven generator power output random model capable of reflecting wind speed variation characteristics. The method comprises the following steps of establishing a wind speed model in consideration of the wind speed variation characteristics; establishing a wind turbine generator output power model; establishing a wind power plant output power model. According to the method, the wind-driven generator power output random model is established based on a sequential hour determinacy model, a semi-invariant method and a Cornish-Fisher stage number, and can reflect the regularity of power output of a wind-driven generator along with seasonal variations and day and night alternation as well as the fluctuations and the indeterminacy of the power output of the wind-driven generator under the influence of factors such as weather, so that the power output of the wind-driven generator is more consistent with an actual condition.

The invention discloses a method of data flow programming oriented to CPU/GPU heterogeneous clusters. The method comprises the steps of utilizing a data flow program to obtain a SDF diagram, conducting hierarchical secondary task division and scheduling on the SDF diagram, setting a stage number for each task unit to obtain the execution order of the task units; utilizing a CPU kernel or GPU mapping from the task unit to heterogeneous cluster nodes in the SDF diagram and a heterogeneous cluster multitask data communication model to obtain data communications between the task units, and obtaining target codes according to the execution order of the task units and the data communications between the task units. According to the method and system of data flow programming oriented to CPU/GPU heterogeneous clusters, the data communications are optimized with the parallelization of the data flow programs, and the overall execution performance of the programs is improved.

The invention discloses a cascading failure multi-stage dynamic game defense method applied to a power system. The method is characterized by comprising the following steps: firstly setting the total stage number of a game process and initial values of stages of a failure party and a defense party; then generating a deterministic strategy set and a risky strategy set by calculating the probability, the consequence and the risk factor of each action adopted at the stage of a bounded rationality failure party in sequence; stipulating a strategy selection sequence of the bounded rationality failure party; judging whether line overload or power angle instability is caused by the action adopted by the bounded rationality failure party, wherein direct current tide sensitivity-based overload control or extended equal area criterion-based stability control can be selectively adopted by a perfect rationality defense party according to a judgment result; judging whether an ending condition of the game process is met; finally calculating revenue functions of the bounded rationality failure party and the perfect rationality defense party; ending the multi-stage dynamic game defense process. According to the method, the blockage of cascading failure is realized, and power blackout accidents are prevented.

The embodiment of the invention provides a time digital conversion method and a time digital converter. The method comprises the following steps that a phase lead signal and a phase lag signal are determined; through N selection signals, the phase lead signal is converted into N phase lead sub-signals, and the phase lag signal is converted into N phase lag sub-signals; the N phase lead sub-signals are input into N delay units, corresponding to the N phase lead sub-signals one to one, of a first delay chain respectively, and the N phase lag sub-signals are input into N delay units, corresponding to the N phase lag sub-signals one to one, of a second delay chain respectively; in each measurement period, the delay units of the phase lag sub-signals ahead of the phase lead sub-signals are determined, a phase difference between a reference clock and a feedback clock is converted into the stage number j of the delay units which are passed previously and then the stage number j is output; the extent of variation of the TDC gain is reduced, and the problems of linearity reduction and burrs caused by adaptation among the delay units are solved.

The invention relates to a titanium tetrachloride purification system and a titanium tetrachloride purification method, wherein raw titanium tetrachloride material liquid treated by a vanadium removal process is subjected to heat exchange by a preheater and then flows into the middle of a de-light rectifying tower to remove impure light components such as SiCl4 and lose a little amount of titanium tetrachloride; the material flow at the tower bottom contains rather pure titanium tetrachloride and flows into the middle of a de-heavy rectifying tower to remove heavy components such as AlCl3 and FeCl3 and lose a little amount of the titanium tetrachloride; and highly pure titanium tetrachloride is obtained at the top of the tower. The operation pressure at the top of the de-light rectifying tower is the normal pressure, the reflux ratio is 60.0-80.0, and the theoretical stage number is 16-22 in total; and the operation pressure at the top of the de-heavy rectifying tower is the normal pressure, the reflux ratio is 1.0-1.2, and the theoretical stage number is 16-22 in total. The purity of the highly pure titanium tetrachloride is at least 99.99%, and the product recycling rate in the process is higher than 97.0%.

A method for producing vanadium pentoxide by ore containing vanadium and intermediate material containing vanadium comprises: fine grinding the ore containing vanadium and the intermediate material containing vanadium into 90-95 % to 80-200 meshes; mixing the fine grinded mineral powder and sulfuric acid evenly to perform sulphation preprocessing; performing water soaking for the material after being sulphated; neutralizing the soaking solution to pH=1.5-2.5 by lime carbonate powder; performing the desiliconisation processing by gelatine and no.3 flocculating agent; aging and separating; extracting the desiliconisation solution, wherein, the extracting agent is P204, the extracting stage number is 8-10; inverse extracting the pregnant organic phase after extracting, wherein, the inverse extracting agent is dilute sulphuric acid, the inverse extracting stage number is 10-12, after inverse extracting, the water solution containing vanadium can be prepared to ammonium metavanadate product by sedimenting ammonium acid carbonate, the ammonium metavanadate can be prepared to qualified metallurgy level or industry level vanadium pentoxide product by calcining.

The present invention relates to test data collecting and controlling system and method. The system includes several test stages, one application server, one test database and one production site managing database. The application server includes one receiving module for receiving test stage number, mainboard sequence number and mainborad test result; one inquiry module for inquiring the relevant information of the mainboard corresponding to some mainboard sequence number; one judgment module for judging the correctness of test stages; one updating module for updating relevant mainboard information; one format converting module for converting the mainboard test result into set database data format; one transmitting module for transmitting the converted mainboard test result to the production site managing database; and one deleting module for deleting test data from the test database. The system can realize automatic collection, sync test and site management.

The invention discloses a wiring delay deviation fast calibration method of an arbitration-type PUF based on an FPGA. According to the technical scheme, fast calibration of delay deviation is achieved by an automatic adjusting circuit which is composed of one counter, one comparator, one dichotomy computing module and one excitation storage module. After input read signals become effective, the excitation storage module outputs stored excitations to the PUF from the first excitation to the last excitation, and afterwards sets excitation marking signals connected with the counter to be effective. When input adjusting completion signals become effective, the counter conducts zero clearing, and begins to conduct accumulative counting on responses of the PUF, and when the excitation marking signals become effective, the counter stops counting, and outputs transfers a counting result to the comparator, the comparator outputs adjusting marking signals for calculating the next adjustment stage to a dichotomy module according to the relation between the counting result and a given threshold value range. In the dichotomy computing module, the next adjustment stage is calculated, and the corresponding adjustment stage is output to be configured and applied in a delay adjustment block of the PUF. Then under the adjustment stage, excitations are input to the PUF again to conduct the next round of adjustment till a counting result is in a threshold value range in the comparator, and then the comparator outputs adjustment stage number marking signals. According to the wiring delay deviation fast calibration method of the arbitration-type PUF based on the FPGA, time consumed in the adjusting process of the PUF can be effectively shortened.