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Array substrate, manufacturing method thereof, and display device

A technology of an array substrate and a manufacturing method, which is applied in the field of display, can solve problems such as difficulty in combining oxide semiconductor technology with low-temperature polysilicon technology, conductorization of oxide semiconductor layers, etc., and achieve the effects of improving display performance, reducing the number of uses, and solving short circuits

Active Publication Date: 2021-01-22
BOE TECH GRP CO LTD
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Problems solved by technology

[0005] The object of the present invention is to provide an array substrate and its manufacturing method, and a display device, so as to solve the problem that it is difficult to combine the oxide semiconductor process with the low-temperature polysilicon process and that the oxide semiconductor layer is easily conductive during the combination process

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  • Array substrate, manufacturing method thereof, and display device
  • Array substrate, manufacturing method thereof, and display device
  • Array substrate, manufacturing method thereof, and display device

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Embodiment Construction

[0034]The present invention will be further described below with reference to the accompanying drawings and exemplary embodiments, in which the same reference numerals in the accompanying drawings all refer to the same components. In addition, if a detailed description of the known technology is unnecessary to show the features of the present invention, it will be omitted.

[0035]The applicant of the present invention thinks of combining the low-temperature polysilicon process with the oxide semiconductor process. The oxide semiconductor (Oxide) process can well make up for the shortcomings of the low-temperature polysilicon (LTPS) process in terms of large leakage current, and the low-temperature polysilicon process can also To make up for the problem of the stability of the threshold voltage of the oxide semiconductor process, the inventor found in practice that the use of low temperature polysilicon (LTPS) process and oxide semiconductor (Oxide) process on the same substrate at the...

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Abstract

The present invention relates to the field of display technology, in particular to an array substrate, a manufacturing method thereof, and a display device. The array substrate includes: a first thin film transistor, a second thin film transistor, a base substrate stacked in sequence, a separation layer capable of supplying hydrogen, and a buffer layer capable of blocking hydrogen; the first thin film transistor includes a polysilicon active layer, so The second thin film transistor includes an oxide semiconductor active layer; the polysilicon active layer and the oxide semiconductor active layer are respectively located on both sides of the buffer layer, wherein the polysilicon active layer is located near the buffer layer one side of the base substrate. The solution provided by the invention can effectively solve the problem of the short circuit of the oxide transistor and improve the display performance of the display device.

Description

【Technical Field】[0001]The present invention relates to the field of display technology, in particular to an array substrate, a manufacturing method thereof, and a display device.【Background technique】[0002]Low-temperature polysilicon (LTPS) thin film transistors are widely welcomed by the market due to their high resolution, high brightness, and high aperture ratio. However, the active layer polysilicon in the low temperature polysilicon (LTPS) process has too much mobility, resulting in higher leakage current. The power consumption is large under low frequency driving. In order to better expand the gray scale, the channel length in the driving thin film transistor (D TFT) must be made large, so that it is difficult to achieve high PPI (Pixels Per Inch), and low temperature polysilicon As the active layer, there is also a problem of high hysteresis, which easily leads to image afterimages.[0003]Metal oxide has emerged as a new semiconductor active layer material. Its advantages are...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/12
CPCH01L27/1214H01L27/1259H01L27/1222H01L27/1225H01L27/1248H01L27/1251H01L21/3003H01L27/1262H01L27/127H01L27/1296H01L29/78609H01L29/78675H01L29/7869
Inventor 周天民杨维王利忠宋吉鹏
Owner BOE TECH GRP CO LTD