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MOS transistor and its manufacturing method

A technology of MOS transistors and manufacturing methods, which is applied in the field of integrated circuit manufacturing technology, can solve problems such as gate performance interference, and achieve the effect of improving performance

Active Publication Date: 2016-06-01
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] The purpose of the present invention is to provide a MOS transistor and its manufacturing method to solve the problem that the gate of the existing MOS transistor is directly formed on the well region, and the random doping disturbance in the well region interferes with the performance of the gate

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  • MOS transistor and its manufacturing method

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Embodiment Construction

[0052] The MOS transistor and its manufacturing method proposed by the present invention will be further described in detail below with reference to the drawings and specific embodiments. Advantages and features of the present invention will be apparent from the following description and claims. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

[0053] Please refer to figure 2 , which is a schematic flowchart of a method for manufacturing a MOS transistor according to an embodiment of the present invention. Such as figure 2 Shown, the manufacturing method of described MOS transistor comprises the steps:

[0054] S20: providing a semiconductor substrate;

[0055] S21: forming a silicon oxide layer, the silicon oxide layer covering part of the semiconductor substrate;

[0056] S22: forming a well layer, th...

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Abstract

The invention provides an MOS transistor and a manufacturing method thereof, wherein the method includes: providing a semiconductor substrate; forming a silicon oxide layer covering part of the semiconductor substrate; forming a well region layer covering the silicon oxide layer and exposed parts of the semiconductor substrate; forming a monocrystalline silicon layer on the well region layer; forming a gate on the monocrystalline silicon layer; carrying out an ion implantation process on parts of the well region layer, at two sides of the gate, and the semiconductor substrate so that source / drain electrodes are formed. Through forming the gate on the monocrystalline silicon layer, problems that the gate is formed on the well region directly and random doping disturbances in the well region cause interference on performance of the gate are prevented so that performance of the MOS transistor is improved.

Description

technical field [0001] The invention relates to an integrated circuit manufacturing process, in particular to a MOS transistor and a manufacturing method thereof. Background technique [0002] With the improvement of integrated circuit integration, the device size is gradually scaled down, and the current feature size has reached the order of 32nm. Metal-oxide-semiconductor field-effect transistors (MOS transistors) are the most common semiconductor devices and are the basic units that constitute various complex circuits. The basic structure of a MOS transistor consists of three main regions: source, drain, and gate. Among them, the source and drain are formed by high doping, which can be divided into n-type doped MOS transistors (NMOS transistors) and p-type doped MOS transistors (PMOS transistors) according to different device types. [0003] Please refer to Figure 1a~1c , which is a schematic cross-sectional view of an existing manufacturing method of a MOS transistor....

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L21/28H01L21/265
Inventor 刘金华
Owner SEMICON MFG INT (SHANGHAI) CORP