Synchronous clock management module based on FPGA

Abstract

The invention discloses a synchronous clock management module based on an FPGA, and belongs to the technical field of electric power systems and automation of the electric power systems. The module includes a B code analysis submodule, a self-synchronizing RTC submodule, a self-synchronizing sampling pulse output submodule and an interface management submodule; all the submodules are integrated into one FPGA, and the B code analysis submodule, the self-synchronizing RTC submodule and the self-synchronizing sampling pulse output submodule can independently work. According to the module, the B code analysis submodule, the self-synchronizing RTC submodule and the self-synchronizing sampling pulse output submodule are integrated into one, the three submodules can work respectively, a completesolution is provided for synchronization clock management of a power-system relay protection and safety automatic device, the module is flexibly suitable for a variety of system implementation modes,the computation overhead of device CPU processing clock management is reduced, the software complexity is reduced, and the reliability of the whole device is improved.

Description

technical field [0001] The invention belongs to the technical field of electric power systems and automation thereof. More precisely, the invention relates to an FPGA-based synchronous clock management module. Background technique [0002] Clock management is an important function of grid safety automatic devices, mainly including the following aspects: [0003] 1) GPS-based time management, involving external B code signal analysis, quality analysis and abnormal monitoring; [0004] 2) When the device is charged, its own RTC timekeeping function, the time resolution is higher than 1ms; [0005] 3) The hardware system of the device needs to generate the trigger pulse used for electrical quantity sampling. When the device is composed of distributed multi-sampling modules, synchronous timing and synchronous sampling are required between the sampling modules, and synchronous triggering between the modules Pulse absolute time deviation is less than 10us; [0006] At present, ...

AI Technical Summary

Problems solved by technology

However, this implementation method makes it impossible for each distributed unit to obtain the second pulse, and the whole system is completely dependent on the clock system of the main chassis, which reduces the reliability of the system

[0010] In order to realize the above functions on relay protection and safety automatic devices, it is necessary to carefully consider device architecture design, software function module division, and multi-module cooperation, which increases the coupling relationship and implementation complexity between the device software and hardware function modules

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