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Neural network processor based on systolic array

A neural network and processor technology, applied in biological neural network models, physical implementation, etc., can solve problems such as increasing memory access power consumption and increasing processor bandwidth design requirements, so as to alleviate bandwidth requirements and improve computing efficiency.

Active Publication Date: 2018-01-12
INST OF COMPUTING TECH CHINESE ACAD OF SCI
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Problems solved by technology

[0003] However, since the neural network processor is a computationally intensive and memory-intensive processor, on the one hand, the neural network model includes a large number of multiplication and addition operations and other nonlinear operations, which require the neural network processor to maintain high load operation to ensure the neural network The computing requirements of the network model; on the other hand, there are a large number of parameter iterations in the neural network computing process, and the computing unit needs to access a lot of memory, which greatly increases the bandwidth design requirements of the processor and increases memory access power consumption.

Method used

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  • Neural network processor based on systolic array
  • Neural network processor based on systolic array
  • Neural network processor based on systolic array

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Embodiment Construction

[0028] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below through specific embodiments in conjunction with the accompanying drawings. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0029] A neural network is a mathematical model formed by modeling the structure and behavior of the human brain. It is usually divided into structures such as an input layer, a hidden layer, and an output layer. Each layer is composed of multiple neuron nodes. The neuron nodes in this layer The output value of will be passed as input to the neuron node of the next layer, and connected layer by layer. The neural network itself has the characteristics of bionics, and its multi-layer abstract iteration process has a similar information processing method to the human brain and other senso...

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Abstract

The invention provides a neural network processor which comprises a control unit, a calculation unit, a data storage unit and a weight storage unit. The calculation unit controlled by the control unitacquires data and weights from the data storage unit and the weight storage unit to perform operation related to a neural network. The calculation unit comprises an array controller and a plurality of processing units connected in a systolic array mode, the data and the weights are input to a systolic array formed by the processing units in different directions, and the processing units simultaneously and parallelly process the data flowing through the processing units. The neural network processor can reach high processing speed, and the input data are repeatedly reused, so that high operation throughput rate can be realized under the condition of consuming small memory access bandwidth.

Description

technical field [0001] The present invention relates to neural network technology, in particular to neural network processor architecture. Background technique [0002] Deep learning has made major breakthroughs in recent years. The neural network model trained with deep learning algorithms has achieved remarkable results in image recognition, speech processing, intelligent robots and other application fields. The deep neural network simulates the neural connection structure of the human brain by building a model, and describes the data features hierarchically through multiple transformation stages when processing signals such as images, sounds, and texts. With the continuous improvement of the complexity of the neural network, the neural network technology has many problems in the actual application process, such as occupying a lot of resources, slow operation speed, and large energy consumption. The method of replacing traditional software computing with hardware accelera...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06N3/063
Inventor 韩银和许浩博王颖
Owner INST OF COMPUTING TECH CHINESE ACAD OF SCI
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