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Field effect transistor with contacts to 2d material active region

A technology of field effect transistors and contacts, which is applied in the field of field effect transistors and can solve problems such as limited performance contact resistance

Active Publication Date: 2020-09-08
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Existing transistors and methods of fabricating transistors with BP or other 2D materials, channels have undesired contact resistances that limit their performance

Method used

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  • Field effect transistor with contacts to 2d material active region
  • Field effect transistor with contacts to 2d material active region
  • Field effect transistor with contacts to 2d material active region

Examples

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Embodiment Construction

[0029] The following disclosure provides many different embodiments or examples for implementing different features of the presented subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. Of course, these are only examples and are not intended to limit the invention. For example, in the following description, forming the first part over or on the second part may include embodiments in which the first part and the second part are formed in direct contact, and may also include between the first part and the second part Embodiments in which additional components may be formed between, so that the first and second components may not be in direct contact. Furthermore, the present disclosure may repeat reference numerals and / or characters in various instances. This repetition is for the purpose of simplicity and clarity, and does not in itself indicate a relationship between the various embodiments and / or configurat...

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Abstract

Examples of the present invention describe the examples of FET devices and its manufacturing methods with a 2D material layer.For example, the black phosphorus source area has the first thickness in the channel area and the larger second thickness in the source / drain (s / d) area.The BP in the S / D area has a side wall, and the side wall contact is set to the contact parts above the FET.The grid electrode is set above the ditch area.In some embodiments, the side wall has the edge of passivation.In some embodiments, the side wall is non -linear.In some embodiments, the stress layer is set above the 2D material layer.Examples of the present invention involve field -effect transistors with contact parts with a source area of 2D materials.

Description

technical field [0001] Embodiments of the invention relate to field effect transistors with contacts to active regions of 2D material. Background technique [0002] Metal oxide semiconductor field effect transistors (MOSFETs), or simply field effect transistors (FETs) or transistors, are widely used in integrated circuits (ICs), including digital integrated circuits, radio frequency (RF) analog circuits, and the like. The gate length of transistors can be reduced or scaled down to increase the packing density of transistors in ICs and increase their speed performance. However, transistors with increasingly miniaturized gate lengths experience undesirable short channel effects such as increased off-state leakage current. [0003] One way to address the suppression of short-channel effects is to employ semiconductor channels with reduced thicknesses, known as ultra-thin body transistors. Ultra-thin body transistors can use ultra-thin channel materials. 2D materials, also kn...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/423H01L29/78H01L21/336
CPCH01L29/778H01L29/785H01L29/4236H01L29/66969H01L29/0657H01L29/24H01L29/0847H01L29/7843H01L27/0886H01L29/1033H01L29/1054H01L29/66795
Inventor 叶凌彦杨育佳刘继文
Owner TAIWAN SEMICON MFG CO LTD
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