Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Lamination and connection process of wafers in 3d NAND flash memory structure

A wafer and flash memory technology, which is applied in the field of wafer lamination and connection technology, can solve the problems affecting the performance of 3D NAND flash memory structure products, reduce the interface bonding force after lamination and connection, and affect the effect of lamination and connection, etc., to achieve enhanced bonding Combined force, improve product performance, increase the effect of interface bonding force

Active Publication Date: 2019-03-19
YANGTZE MEMORY TECH CO LTD
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] However, in the above process, the flattened connection surface 2 is very smooth, so that the connection surfaces are subjected to great resistance when they are close to each other and combined, and at the same time, the bonding force of the interface after the superposition connection will be reduced, thereby affecting the superposition connection. effect, and ultimately affect the product performance of the 3D NAND flash memory structure

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Lamination and connection process of wafers in 3d NAND flash memory structure
  • Lamination and connection process of wafers in 3d NAND flash memory structure
  • Lamination and connection process of wafers in 3d NAND flash memory structure

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0032] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided for more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0033] In the interest of clarity, not all features of an actual implementation are described. In the following description, well-known functions and constructions are not described in detail since they would obscure the invention with unnecessary detail. It should be appreciated that in the development of any actual embodiment, numerous implementation details must be worked out to achieve the developer's specific goals, such as ch...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a superimposed connection process for wafer connection in a 3D NAND flash memory structure, which includes the following steps: providing two wafer structures; performing preprocessing, specifically on the superimposed connection surfaces of the two wafer structures. Preprocessing is performed to roughen the overlay connection surface; overlay the overlay connection surfaces of the two wafer structures and connect the two wafer structures into an integrated structure. By performing plasma treatment on the overlay connection surface, a relatively rough overlay connection surface is obtained to increase the interfacial bonding force after the overlay connection; ion implantation is used to ion-dope the overlay connection surface to reduce the overlay connection surface The contact resistance of the conductive medium between them; by annealing the integrated structure after the lamination and connection, the atomic diffusion at the interface is accelerated, thereby increasing the interface bonding force after the lamination and connection; through the above process of the present invention, multiple laminations can be enhanced It combines the bonding force of the wafer connection interface to improve the product performance of the 3D NAND flash memory structure.

Description

technical field [0001] The present invention relates to the field of semiconductor manufacturing, in particular to a 3D NAND flash memory structure and a manufacturing method thereof, in particular to a superposition of wafers capable of enhancing the bonding force during wafer connection in the 3D NAND flash memory structure and reducing the contact resistance of conductive media Connection process. Background technique [0002] With the development of planar flash memory, the production process of semiconductors has made great progress. However, in recent years, the development of planar flash memory has encountered various challenges: physical limits, existing development technology limits, and storage electron density limits. In this context, in order to solve the difficulties encountered in planar flash memory and to seek lower production costs per unit storage unit, various three-dimensional (3D) flash memory structures have emerged, such as 3D NOR (3D or not) flash m...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11524H01L27/11551H10B41/35H10B41/20
Inventor 张坤刘藩东夏志良
Owner YANGTZE MEMORY TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com