Three-dimensional through silicon via vertical interconnection method based on graphene composite structure

Abstract

The invention discloses a three-dimensional through silicon via vertical interconnection method based on a graphene composite structure, which comprises the steps of manufacturing a silicon via in a silicon substrate; depositing an insulating layer at the surface of the silicon substrate and the inner wall of the silicon via; depositing a barrier layer on the insulating layer, and depositing a catalytic metal layer on the barrier layer; growing a graphene composite structure layer at the surface of the catalytic metal layer; attaching a dry film to the surface of the graphene composite structure layer on the silicon substrate, and then performing exposure and development to form a dry film layer; depositing a seed layer at the bottom surface of the silicon via and the surface of the dry film layer; and filling the silicon via with a conductive material. According to the invention, a via is manufactured in the silicon substrate, then an insulating layer, a barrier layer and a catalyticmetal layer are successively deposited, a graphene composite structure layer grows, a dry film is attached, a seed layer is deposited, and then the via is filled with a conductive material, so that aproblem of high-frequency signal electromagnetic coupling crosstalk of a 3D TSV (Three-Dimensional Through Silicon Via) structure is solved by using excellent thermodynamic, mechanical and material properties of the graphene material.

Description

technical field [0001] The invention relates to a method for vertical interconnection of through-silicon holes, in particular to a method for vertical interconnection of three-dimensional through-silicon holes based on a graphene composite structure, and belongs to the technical field of microelectronic packaging. Background technique [0002] The three-dimensional packaging technology makes full use of the z-direction space, greatly reduces the interconnection length, improves the packaging density, reduces power consumption, and has a higher degree of chip function integration. Through silicon via vertical interconnection (TSV, Through Silicon Via) technology is a technology that realizes signal interconnection of multilayer planar devices in the z-axis direction by making vertical passages inside the wafer or chip and filling the holes with metal. Because of its distinctive process characteristics, TSV technology has been extensively studied by the industry. [0003] For...

AI Technical Summary

Problems solved by technology

[0003] For highly dense small-aperture, high-aspect-ratio TSV structures, the transverse propagation of electromagnetic waves occurs in the TSV array, the number of TSV channels that can be affected increases, and the interference intensity increases significantly. There is a strong electromagnetic coupling between adjacent interconnection structures, causing crosstalk. , distortion and other effects are significantly enhanced, crosstalk is an important problem in the application of interconnection lines, it causes signal delay and crosstalk noise, thus affecting the performance of the circuit

In addition, high heat flux leads to intensified thermoelectric coupling, electrical signal distortion, delay and loss, and changes in magnetic state at high temperature, which seriously affects signal transmission and makes it difficult to control

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