Method and system for realizing high-order and low-order hybrid crossing of SDH based on FPGA

A high-level, cross-module technology, applied in the field of communication, can solve problems such as high cost and inflexibility, and achieve the effect of saving implementation costs and cross-flexibility

Inactive Publication Date: 2018-03-13
TOEC TECH
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AI Technical Summary

Problems solved by technology

With the continuous growth of business volume and business types, when access data is cross-switched, it is necessary to deal with the problem of dealing with high-order and low-order time slots separately, and high-order time slots and low-order time slots are often in the Mixed coexistence in the sam...

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  • Method and system for realizing high-order and low-order hybrid crossing of SDH based on FPGA

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Embodiment Construction

[0022] The present invention will be further described below in conjunction with the accompanying drawings.

[0023] like figure 1 As shown, the system includes: frame header recovery module, high-order pointer adjustment module, low-order pointer adjustment module, first memory, second memory, high-order pointer generation module, address generation module, low-order pointer generation module, high-order A cross-connect module, a low-order cross-connect module, a control module, a high-order and low-order selection module, and a third memory; wherein, the frame header recovery module receives data and is connected to a high-order pointer adjustment module, and the high-order pointer adjustment module is respectively connected to the first memory, the low-order memory The high-order pointer adjustment module is connected, the first memory is connected with the high-order pointer generation module, the low-order pointer adjustment module is connected with the second memory, the...

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Abstract

The invention discloses a method and system for realizing SDH high-low order mixed crossover based on FPGA. The access data first finds the frame header of SDH through the frame header recovery module and restores the frame structure; the data finds the high and low order pointers of SDH through the high and low order pointer adjustment module and restores the high and low order time slots; the data is copied twice respectively Processing is carried out through high and low order processing branches; the control module generates cross instructions, controls the high and low order cross modules to perform cross exchange of corresponding data, controls the high and low order selection modules to select and switch data, and realizes the convergence and reorganization of high and low order data. The present invention realizes simultaneous access and processing of high and low order mixed data and arbitrary cross exchange, and the final output data is arbitrary high and low order mixed data, which solves the problem that high and low order data in traditional cross can only be processed separately, making access, Interleaving is more flexible, and the implementation cost is saved by combining the high and low order processing methods compared with separate processing methods.

Description

technical field [0001] The invention relates to the communication field, and relates to an FPGA-based method and system for realizing SDH high-low order mixed crossover. It specifically involves the pointer analysis and adjustment technology, high-order and low-order crossover technology, screening and reorganization technology of Synchronous Digital Hierarchy (SDH). Background technique [0002] Synchronous Digital Hierarchy (SDH) is widely used in optical fiber communication, including backbone network, metropolitan area network and access network. With the continuous growth of business volume and business types, when access data is cross-switched, it is necessary to deal with the problem of dealing with high-order and low-order time slots separately, and high-order time slots and low-order time slots are often in the Mixed coexistence in the same channel, the traditional processing method is to separate high-order and low-order data to different devices or boards for pro...

Claims

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Application Information

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IPC IPC(8): H04J3/16
CPCH04J3/1664H04J3/167
Inventor 李斌王尧贾朋朋宛文顺王润生汪洋孙静
Owner TOEC TECH
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