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Manufacturing method of SONOS memory grid electrode structure

A memory gate and manufacturing method technology, applied in the direction of electric solid-state devices, semiconductor devices, electrical components, etc., can solve the problems of unstable reliability, ONO, corrosion, etc., and achieve the effect of saving process costs and etching process steps

Inactive Publication Date: 2018-03-23
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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Problems solved by technology

[0008] It can be seen from the above that the existing gate structure formation process, such as products formed under the self-aligned SONOS platform of 95nm and below, is easy to form undercut at the bottom of the polysilicon gate, causing ONO defects
Subsequent wet etching is easy to further corrode the ONO structure through the defect of ONO, resulting in unstable reliability

Method used

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  • Manufacturing method of SONOS memory grid electrode structure
  • Manufacturing method of SONOS memory grid electrode structure
  • Manufacturing method of SONOS memory grid electrode structure

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Embodiment Construction

[0029] Such as figure 2 Shown is the flowchart of the manufacturing method of the SONOS memory gate structure of the embodiment of the present invention; as Figure 3A to Figure 3C Shown is a schematic diagram of the structure of each step of the manufacturing method of the SONOS memory gate structure of the embodiment of the present invention. The manufacturing method of the SONOS memory gate structure of the embodiment of the present invention includes the following steps:

[0030] Step 1, such as Figure 3A As shown, an ONO layer 2, a polysilicon gate 3, and a top oxide layer 4 are sequentially formed on the surface of a semiconductor substrate 1; the ONO layer 2 includes a first oxide layer 2a, a second nitrogen oxide layer, and oxide layer 2b and third oxide layer 2c. Preferably, the semiconductor substrate 1 is a silicon substrate. The first oxide layer 2a, the third oxide layer 2c, the subsequent top oxide layer 4 and the first sidewall oxide layer 6 are all silicon...

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Abstract

The invention discloses a manufacturing method of an SONOS memory grid electrode structure. The method comprises steps of step 1, successively forming an ONO layer, a polysilicon gate and a top oxidelayer; step 2, carrying out photoetching to define forming regions of the grid electrode structure and successively etching the top oxide layer and the polysilicon gate; step 3, successively depositing a first side wall oxide layer and a second side wall nitration layer; and step 4, using the comprehensive etching technique to successively etch the second side wall nitration layer, the first sidewall oxide layer and the ONO layer, and carrying out auto-collimation on the formed side wall structures, and the ONO layers at the bottoms of the polysilicon gate and the side wall structures. According to the invention, the reliability of the device can be improved and technique cost can be reduced.

Description

technical field [0001] The invention relates to a manufacturing method of a semiconductor integrated circuit, in particular to a manufacturing method of a SONOS memory gate structure. Background technique [0002] As an important indicator of semiconductor devices, reliability plays a key role in the stable and reliable operation of the devices. The ONO layer of the SONOS memory gate structure usually adopts a self-aligned structure with the side of the polysilicon gate. Since the ONO layer is directly related to the storage of information in the memory, the formation process of the ONO layer is particularly important for the stable and reliable operation of the device. Such as Figure 1A to Figure 1D Shown is a structural schematic view of each step in the manufacturing method of the existing SONOS memory gate structure, and the manufacturing method of the existing SONOS memory gate structure includes the following steps: [0003] Step 1, such as Figure 1A As shown, an ...

Claims

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Application Information

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IPC IPC(8): H01L27/11563H01L29/40H01L29/423
CPCH01L29/401H01L29/4234H10B43/00
Inventor 邵国键张可钢
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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