Manufacturing method of SONOS memory grid electrode structure

A memory gate and manufacturing method technology, applied in the direction of electric solid-state devices, semiconductor devices, electrical components, etc., can solve the problems of unstable reliability, ONO, corrosion, etc., and achieve the effect of saving process costs and etching process steps

Inactive Publication Date: 2018-03-23
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
View PDF8 Cites 2 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] It can be seen from the above that the existing gate structure formation process, such as products formed under the self-aligned SONOS platform of 95nm and below, is easy to form unde

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Manufacturing method of SONOS memory grid electrode structure
  • Manufacturing method of SONOS memory grid electrode structure
  • Manufacturing method of SONOS memory grid electrode structure

Examples

Experimental program
Comparison scheme
Effect test

Example Embodiment

[0029] Such as figure 2 Shown is a flowchart of a method for manufacturing a SONOS memory gate structure according to an embodiment of the present invention; Figure 3A to Figure 3C What is shown is a schematic diagram of the structure in each step of the manufacturing method of the SONOS memory gate structure in the embodiment of the present invention. The manufacturing method of the SONOS memory gate structure in the embodiment of the present invention includes the following steps:

[0030] Step one, such as Figure 3A As shown, an ONO layer 2, a polysilicon gate 3, and a top oxide layer 4 are sequentially formed on the surface of the semiconductor substrate 1. The ONO layer 2 includes a first oxide layer 2a and a second nitrogen The oxide layer 2b and the third oxide layer 2c. Preferably, the semiconductor substrate 1 is a silicon substrate. The first oxide layer 2a, the third oxide layer 2c, the subsequent top oxide layer 4 and the first sidewall oxide layer 6 are all silico...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a manufacturing method of an SONOS memory grid electrode structure. The method comprises steps of step 1, successively forming an ONO layer, a polysilicon gate and a top oxidelayer; step 2, carrying out photoetching to define forming regions of the grid electrode structure and successively etching the top oxide layer and the polysilicon gate; step 3, successively depositing a first side wall oxide layer and a second side wall nitration layer; and step 4, using the comprehensive etching technique to successively etch the second side wall nitration layer, the first sidewall oxide layer and the ONO layer, and carrying out auto-collimation on the formed side wall structures, and the ONO layers at the bottoms of the polysilicon gate and the side wall structures. According to the invention, the reliability of the device can be improved and technique cost can be reduced.

Description

technical field [0001] The invention relates to a manufacturing method of a semiconductor integrated circuit, in particular to a manufacturing method of a SONOS memory gate structure. Background technique [0002] As an important indicator of semiconductor devices, reliability plays a key role in the stable and reliable operation of the devices. The ONO layer of the SONOS memory gate structure usually adopts a self-aligned structure with the side of the polysilicon gate. Since the ONO layer is directly related to the storage of information in the memory, the formation process of the ONO layer is particularly important for the stable and reliable operation of the device. Such as Figure 1A to Figure 1D Shown is a structural schematic view of each step in the manufacturing method of the existing SONOS memory gate structure, and the manufacturing method of the existing SONOS memory gate structure includes the following steps: [0003] Step 1, such as Figure 1A As shown, an ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H01L27/11563H01L29/40H01L29/423
CPCH01L29/401H01L29/4234H10B43/00
Inventor 邵国键张可钢
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap