LDPC encoder

Abstract

The invention provides an LDPC encoder. The LDPC encoder comprises encoding memories (N random access memories), a memory controller, an operator, a delay module and a combine module; the encoding memories store a set LDPC encoding matrix and an LDPC code table; the memory controller is used for conducting read-write control over the N RAMs in parallel; the operator is used for conducting operation on the information bit part in encoding codewords and the LDPC encoding matrix; the delay module expresses to conduct necessary delay on the input information bit part and is used for allowing the generated check bit part to be capable of being continuously output with the information bit part; the combine module is used for combining the information bit part with the check bit part and then output the combined part; and operation results obtained by the operator are registered in the encoding memories, and the number of the encoding memories is determined by the maximum column N of the encoding matrix. Accordingly, the memory space of the LDPC can be as small as possible, the design difficulty cannot be too high, and the universality of different codewords also can be considered.

Description

technical field [0001] The invention belongs to the technical field of channel coding, in particular to an LDPC coder. Background technique [0002] LDPC (Low Density Parity Check Code, Low Density Parity Check Code) coding technology is a research hotspot in the field of channel coding in recent years, and has been widely used in satellite communication, optical fiber communication, mobile communication, digital broadcast communication and other fields. The advantage of LDPC code is that it is close to the Shannon limit, flexible structure, and lower error floor; but the disadvantage is that the hardware resource requirements are relatively large, especially the longer codewords can reflect the performance advantages, resulting in more complex encoding and requiring more hardware. The resources are larger; if the encoder is designed purely from the perspective of saving resources, the control of the encoder will be complicated or excessive processing delay will be brought. ...

AI Technical Summary

Problems solved by technology

Such a large storage capacity requirement is very unfavorable for the miniaturization and low power consumption of the LDPC encoder; in order to save storage space, only 1*25920 storage units can be used, but the corresponding addressing operations will become quite complicated. The processing delay will also be greatly increased, which will bring great difficulties to achieve fast and reliable LDPC encoding

In addition, because LDPC codewords also have certain "irregular" characteristics, that is, a considerable part of the codewords cannot be obtained through calculations, so that the implementation structure of the LDPC encoder is closely related to the construction structure of the codewords, thus changing the code table is likely to lead to The entire LDPC encoder design is pushed back to the

[0004] In summary, when constructing an LDPC encoder, if we can find a way to make the storage space of the LDPC encoder as small as possible, without making the design too difficult, and taking into account the versatility of different codewords—— Replacing the codeword will not make the whole design overturned and restarted, so this method can be regarded as a significantly improved LDPC encoder design method

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