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DDR-based reading data synchronization method and system

A technology for synchronizing systems and reading data, applied in electrical digital data processing, instruments, etc., can solve problems such as restricting DDR high-speed transmission, and achieve the effects of satisfying setup time and hold time, reducing design area, and reducing data delay.

Active Publication Date: 2018-05-15
灿芯创智微电子技术(北京)有限公司
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Problems solved by technology

[0010] As a high-speed interface, the frequency of DDR is constantly increasing. When the clock is higher than 800Mhz, the timing problem becomes a very large bottleneck in the design of a DDR controller. In particular, when DDR reads data, the DQS (data selection pulse) returned from DRAM and The synchronization problem of the sampling clock inside the DDR controller restricts the high-speed transmission of DDR

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  • DDR-based reading data synchronization method and system
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  • DDR-based reading data synchronization method and system

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Embodiment Construction

[0061] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0062] figure 1 A flow chart of a DDR-based read data synchronization method provided in a specific embodiment of the present invention is shown,

[0063] The input data strobe signal half_input_dqs_n is used as the DQS signal of the DDR interface, which is the external input clock of the DDR.

[0064] Use the sampling clock internal_clk as the internal sampling clock of the DDR controller,

[0065] Between the DQS signal of the DDR interface and the internal sampling clock of the DDR controller, a transition clock is established as a synchronous clock, and the synchronous clock realizes the synchronization of the internal sampling clock of the DDR controller and the external input clock of the DDR, and realizes the DQS domain data of the DDR interface and DDR Asynchronous transfer of data in the sampling clock domain within the con...

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Abstract

The invention discloses a DDR-based reading data synchronization method and system. The method uses a frequency divider to input a data strobe signal half-inpu-dqs-n as a DDR interface DQS signal, a sampling clock internal-clk serves as a sampling clock in a DDR controller, a transition clock is set up as a synchronous clock between the DDR interface DQS signal and the sampling clock in the DDR controller, and the synchronous clock achieves the synchronization of the sampling clock in the DDR controller and an input color outside the DDR and achieves asynchronous transmission of DDR interfaceDQS domain data and domain data of the sampling color in the DDR controller. According to the method and the system, the building time and the retention time of a DQS domain and a sampling color domain in the DDR controller can be satisfied to the maximum extent, the synchronization problem of the DDR reading data is solved with a very small delay, and the method and the system no longer rely on the FIFO technology.

Description

technical field [0001] The invention relates to the technical field of DDR memory data reading and writing, in particular to a DDR-based reading data synchronization method and system. In the present invention, DDR refers to DDR3 memory. Background technique [0002] DDR (DDR memory) is the habitual abbreviation of DDR SDRAM. Its full name should be double-rate synchronous dynamic random access memory, among which: DDR is the abbreviation of Double Data Rate, and SDRAM is the abbreviation of Synchronous Dynamic Random Access Memory. The advantages of DDR are large storage capacity, low cost, mature interface, and high access rate can be achieved during parallel burst access. [0003] DDR memory is developed on the basis of SDRAM memory and still uses the SDRAM production system. Therefore, for memory manufacturers, it is only necessary to slightly improve the equipment for manufacturing ordinary SDRAM to realize the production of DDR memory, which can effectively reduce co...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/16G06F13/42
CPCG06F13/1668G06F13/4239
Inventor 王亮
Owner 灿芯创智微电子技术(北京)有限公司
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