Operational amplifier with offset elimination structure and amplifier circuit

Abstract

The invention discloses an operational amplifier with an offset elimination structure. A gate of a fourth PMOS transistor and the gate of a third PMOS transistor are respectively connected with two sides of a first capacitor. The gate of the third PMOS transistor is connected with the drain of the third PMOS transistor and the drain of a first NMOS transistor. The gate of the fourth PMOS transistor is connected with the drain of the fourth PMOS transistor and the drain of a second NMOS transistor through a first switch. The gate of the second NMOS transistor is connected with a negative inputend. The gate of the first NMOS transistor is connected with a positive input end. The positive input end is connected with the negative input end through a second switch. According to the operationalamplifier with the offset elimination structure disclosed by the invention, an offset voltage of the whole amplifier circuit is stored on the first capacitor C1 in a five-transistor operational amplifier circuit, the precision loss of a traditional input offset elimination structure is avoided, and the increase of an area and power consumption of a traditional output offset elimination structureresulting from addition of a pre-amplifier circuit is also avoided.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to an amplifier circuit with an offset elimination structure. Background technique [0002] The operational amplifier circuit is the core circuit of many analog circuits, and the performance index it can achieve usually determines the performance index of the entire analog circuit. Therefore, the design of a high-performance amplifier circuit is a problem that must be faced in the design of analog circuits. An indicator that limits the performance of the amplifier is the offset of the amplifier circuit, which can be expressed as offset voltage and offset current. Since the amplifier circuit in the analog circuit is usually used to amplify voltage, the offset in this document mainly refers to the offset voltage. [0003] In order to improve the precision of the analog circuit, an amplifier circuit offset cancellation structure is proposed. Traditional offset cancellation structure...

AI Technical Summary

Problems solved by technology

Compared with the input offset cancellation structure, this output offset cancellation structure does not add capacitance at the input end, so that no parasitic capacitance is introduced at the input end, but because the output offset voltage of the amplifier circuit is usually large, exceeding the output range of the amplifier circuit, this will cause cause the offset voltage cannot be completely eliminated, so figure 2 The output offset cancellation structure shown is generally used in the case where the amplification factor of the amplifier circuit is very small (generally no more than ten times), and then an amplifier circuit is connected behind to increase the amplification factor of the entire amplifier circuit

Such a two-stage structure amplifier circuit is called a pre-amplifier circuit with a low amplification factor before the two-stage structure. Obviously, the two-stage structure will consume more power consumption and area.

[0006] The loss of accuracy faced by the input offset cancellation structure and the large area and power consumption requirements of the output offset cancellation structure are the main problems faced by the current offset cancellation structure

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