FPGA (field programmable gate array) data processing method and FPGA data processing system based on novel CHSI (crypto host serial interface) optimization

A data processing and interface technology, applied in the field of FPGA data processing, can solve problems such as high bit error rate, achieve the effect of ensuring transmission efficiency, improving communication performance, improving reliability and anti-interference ability

Active Publication Date: 2018-06-05
四川九洲空管科技有限责任公司
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  • Abstract
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  • Claims
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AI Technical Summary

Problems solved by technology

[0006] The technical problem to be solved by the present invention is to provide a novel CHSI interface-based FPGA data processing method and system based on the above-mentioned problems. Firstly, a high-precision differential local oscillator clock is designed according to the characteristics of CHSI interface output and input timing processing. source; then the internal clock phase-locked loop of the field programmable logic array FPGA generates the basic clock for CHSI interface output and input timing processing;

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  • FPGA (field programmable gate array) data processing method and FPGA data processing system based on novel CHSI (crypto host serial interface) optimization
  • FPGA (field programmable gate array) data processing method and FPGA data processing system based on novel CHSI (crypto host serial interface) optimization
  • FPGA (field programmable gate array) data processing method and FPGA data processing system based on novel CHSI (crypto host serial interface) optimization

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Embodiment Construction

[0049] All features disclosed in this specification, or steps in all methods or processes disclosed, may be combined in any manner, except for mutually exclusive features and / or steps.

[0050] Any feature disclosed in this specification, unless specifically stated, can be replaced by other alternative features that are equivalent or have similar purposes. That is, unless expressly stated otherwise, each feature is one example only of a series of equivalent or similar features.

[0051] The block flow diagram of a preferred embodiment 1 of the present invention is as figure 1 As shown, the specific steps are:

[0052] Step 101: According to the characteristics of CHSI output and input timing processing, design and select a high-precision differential local oscillator clock source of 32 MHz, and deliver the differential clock signals CLOCK_+ and CLOCK_- of the clock source to the global clock unit of the field programmable logic array FPGA;

[0053] Step 102: According to the...

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Abstract

The invention belongs to the field of processing of identification-friend-or-foe digital signals in western systems, and relates to an FPGA (field programmable gate array) data processing method and an FPGA data processing system based on novel CHSI optimization. The problems such as high error rate, low data transmission reliability and low real-time processing efficiency in the prior art are solved. The FPGA data processing method mainly includes designing a high-precision differential local oscillation clock source according the characteristics of CHSI output and input time sequence processing; generating a basic clock of the CHSI output and input time sequence processing by an internal clock phase-locked loop of an FPGA; according to a given CHSI transmission circuit and a time sequence processing optimization method, and based on time sequence characteristics, data frame structures and status switching control, processing data of CHSI input and output time sequences.

Description

technical field [0001] The invention belongs to the field of IFF digital signal processing in the western system, relates to an FPGA data processing method and system, in particular to an FPGA data processing method and system based on novel CHSI interface optimization. Background technique [0002] In modern information warfare, traditional IFF combat platforms are faced with a more complex electromagnetic environment and increasing target threats, and their survivability and combat performance are severely challenged and tested. In order to cope with this situation, NATO countries regard the anti-jamming performance and high security performance of combat platforms as the technical development direction. After the Gulf War and the Iraq War, the development direction of the identification friend or foe system in the western system has shifted its research focus from the traditional "ground-to-air" and "air-to-air" identification to the identification system of the joint com...

Claims

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Application Information

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IPC IPC(8): G06F13/38G06F13/40G06F13/28
CPCG06F13/28G06F13/385G06F13/4072G06F13/4086G06F2213/3852
Inventor 李建秋王世民彭杰文李涵文
Owner 四川九洲空管科技有限责任公司
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