MANUFACTURING METHOD of semiconductor device

Abstract

Provided is a manufacturing method of a semiconductor device. A semiconductor device including a field effect transistor (FET) device includes a substrate and a channel structure formed of a two-dimensional (2D) material over the substrate. Source and drain contacts are formed partially over the 2D material. A first dielectric layer is formed at least partially over the channel structure and at least partially over the source and drain contacts. The first dielectric layer is configured to trap charge carriers. A second dielectric layer is formed over the first dielectric layer, and a gate electrode is formed over the second dielectric layer.

Description

Technical field [0001] The disclosed embodiments are related to a semiconductor integrated circuit, and in particular, to an impact ionization transistor with two-dimensional (2D) channels. Background technique [0002] Regardless of the structure, semiconductor devices that use advanced technology nodes (for example, less than 7 nanometers), such as ultra-thin body (SILICON ON INSULATOR, SOI) or finfield-effect transistors (finfield- The effect transistor (FinFET) structure may have a relatively thin channel thickness (for example, in the range of about 0.5 nm to 5 nm). For these devices, two-dimensional layered materials are considered strong candidates to replace silicon. The two-dimensional material of interest has desired properties, for example, a monolayer film containing self-assembled molecules (for example, less than 1 nanometer in thickness), high and symmetrical electron and hole mobility (for example, greater than 200 square centimeters per volt per second ( cm 2 / ...

AI Technical Summary

Problems solved by technology

However, the performance of 2D field effect transistors may be limited in particular by contact resistance caused by non-ideal metals and / or 2D materials (eg with Schottky barriers)

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