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A method and device for simulating defects on the back of a wafer

A wafer and defect technology, applied in the field of simulating wafer backside defects, can solve the problems of high cost, low detection accuracy, inconsistent standards, etc. Effect

Active Publication Date: 2020-06-23
WUHAN XINXIN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The traditional detection of defects on the back of the wafer is generally carried out manually. Manual detection has a certain degree of subjectivity, and the standards are not uniform, which will result in low detection accuracy.
Or carry out mechanical inspection by purchasing expensive machines, but the cost of this method is too high

Method used

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  • A method and device for simulating defects on the back of a wafer
  • A method and device for simulating defects on the back of a wafer
  • A method and device for simulating defects on the back of a wafer

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Embodiment Construction

[0039] The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.

[0040] figure 1 It is a schematic flow chart of a method for simulating defects on the back of a wafer according to an embodiment of the present invention, as figure 1 The methods shown for simulating wafer backside defects include:

[0041] S100, analyzing the wafer edge and center of the wafer according to the panoramic image or partial image on the back of the wafer, and detecting and obtaining the defect area on the back of the wafer;

[0042] The defective area may be a continuous area containing several pixels; it may also be a separated area, or it may be a separated area and a separated pixel. The defect area in the embodiment of the present invention is a gener...

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Abstract

The present invention provides a method and device for simulating backside defects of a wafer. The method includes the following steps that: the crystal edge and center of a wafer are analyzed according to the panoramic image or partial image of the back side of the wafer, and the defect area of the back side of the wafer is detected and obtained; a pixel distance between the defect area and the specific point of the wafer is calculated, wherein the specific point is the center or other position point of the wafer; and the defect area is associated with the actual size of the wafer, and the panoramic image or partial image of the back side of the wafer is converted into a defect recognition image according to the pixel distance. According to the method and device of the invention, the defect area of the back side of the wafer is detected and obtained according to the panoramic image or partial image of the back side of the wafer; the panoramic image or partial image is converted into the defect recognition image according to a relation between the actual size of the wafer and the size of the defect area; and therefore, problem such as problems of high machine purchase cost and highsubjectivity of manual inspection can be solved.

Description

technical field [0001] The invention relates to the technical field of semiconductor integrated circuits, and more specifically, to a method and device for simulating defects on the back of a wafer. Background technique [0002] Wafer refers to the silicon wafer used in the manufacture of semiconductor integrated circuits. Its shape is circular, so it is called a wafer. Silicon wafers can be processed into various circuit element structures and become IC products with specific electrical functions. [0003] In the wafer manufacturing process, there will inevitably be some defects, and the defects on the back of the wafer have an increasing impact on the production process of integrated circuits. The manufacturing process of modern integrated circuits generally includes hundreds of processes, and any small error may lead to the failure of the entire chip. Therefore, the detection of wafer defects is very important, and the detection accuracy will also affect the success or ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/66
CPCH01L22/12
Inventor 李剑
Owner WUHAN XINXIN SEMICON MFG CO LTD