A method and device for simulating defects on the back of a wafer
A wafer and defect technology, applied in the field of simulating wafer backside defects, can solve the problems of high cost, low detection accuracy, inconsistent standards, etc. Effect
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[0039] The specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.
[0040] figure 1 It is a schematic flow chart of a method for simulating defects on the back of a wafer according to an embodiment of the present invention, as figure 1 The methods shown for simulating wafer backside defects include:
[0041] S100, analyzing the wafer edge and center of the wafer according to the panoramic image or partial image on the back of the wafer, and detecting and obtaining the defect area on the back of the wafer;
[0042] The defective area may be a continuous area containing several pixels; it may also be a separated area, or it may be a separated area and a separated pixel. The defect area in the embodiment of the present invention is a gener...
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