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Method and system for determining failure rate of electrical circuits

A technology for circuit failure and failure rate, applied in the field of determining the time failure rate of a circuit, a system for determining the time failure rate, and the field of non-transitory computer-readable media, which can solve problems such as affecting reliability, increasing the number of iterations, and overestimating failure rates.

Active Publication Date: 2022-04-26
ORACLE INT CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Increasing total wire length and current density while reducing wire width affects EM reliability assurance
Consequently, EM sign-off or verification steps that a circuit may need to pass during pre-manufacturing reliability testing may report IC prototypes that fail verification steps because current EM analysis methods do not adequately guarantee EM reliability
This results in an increase in the number of iterations during the IC design process
Therefore, there is a need for accurate EM analysis that rejects the pessimism that limits current EM analysis, where pessimism may stem from overestimation of failure rates, leading to increased IC design iterations

Method used

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  • Method and system for determining failure rate of electrical circuits
  • Method and system for determining failure rate of electrical circuits
  • Method and system for determining failure rate of electrical circuits

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Embodiment Construction

[0009] Specific embodiments of the present invention will now be described in detail with reference to the accompanying drawings. For consistency, the same elements in the various drawings are designated by the same reference numerals.

[0010] In the following detailed description of the embodiments of the present invention, various specific details are set forth in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without these specific details. In other instances, well known features have not been described in detail to avoid unnecessarily complicating the description.

[0011] Throughout the application, ordinal numbers (eg, first, second, third, etc.) may be used as adjectives for elements (ie, any noun in the application). Unless expressly disclosed, such as through use of the terms "before," "after," "single," and other such terms, the use of ordi...

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Abstract

One method involves determining the temporal failure rate of the circuit. The method may include obtaining circuit data about the circuit. The circuit may include a first wire segment and a second wire segment. The method can also include obtaining reliability data. Reliability data describes the failure of a circuit over a predetermined period of time. The method can also include obtaining a heat map. The method may also include determining a first failure rate for the first wire segment of the circuit. The first failure rate may be a probability that the first wire segment fails within a predetermined amount of time. The method may also include determining a second failure rate for the second wire segment of the circuit. The method may also include generating a model of the circuit. A model of the circuit may describe a first failure rate and a second failure rate of the circuit.

Description

Background technique [0001] Electromigration (EM) is a physical phenomenon in which metal atoms of circuit interconnections migrate in the direction of an applied electric field due to the random bombardment of conducting electrons. This migration results in a depletion or accumulation of metal density. Chip interconnects are used for signal propagation as well as voltage delivery. EM affects both functions by reducing the conductivity of the interconnect. Increasing the total wire length and current density while reducing the wire width affects the assurance of EM reliability. Consequently, EM sign-off or verification steps that a circuit may need to pass during pre-manufacturing reliability testing may report IC prototypes that fail verification steps because current EM analysis methods do not adequately guarantee EM reliability. This can lead to an increase in the number of iterations during the IC design process. Therefore, there is a need for accurate EM analysis that...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/32G06F119/02
CPCG06F2111/08G06F30/367G06F2119/04G06F2119/08G06F30/20G06F30/398G06F30/30G06F30/39G06F2119/02
Inventor G·萨拉斯沃特W·C·W·奥A·特里维迪
Owner ORACLE INT CORP