Semiconductor structure and formation method thereof

A semiconductor and patterning technology, used in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., and can solve problems such as poor quality of target graphics

Active Publication Date: 2018-09-25
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, even with the introduction of the self-aligned double patterning process, the quality of the target pattern formed after etching is still poor

Method used

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  • Semiconductor structure and formation method thereof
  • Semiconductor structure and formation method thereof
  • Semiconductor structure and formation method thereof

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Experimental program
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Embodiment Construction

[0016] It can be known from the background art that even if the self-aligned double patterning process is introduced, the quality of the target pattern formed after etching is still poor, which easily leads to a decrease in the performance and yield of the formed semiconductor structure. The reasons for this are now analyzed in conjunction with a method for forming a semiconductor structure of the invention.

[0017] refer to Figure 1 to Figure 5 , a schematic diagram of the structure corresponding to each step in a method for forming a semiconductor structure is shown.

[0018] refer to figure 1 , to provide a material layer 10 to be etched, and a plurality of discrete core layers 21 are formed on the material layer 10 to be etched.

[0019] refer to figure 2 , forming a sidewall film 40 on the top and sidewall surfaces of the core layer 21 and the material layer 10 to be etched.

[0020] refer to image 3 , using a maskless etching process to etch the sidewall film 40...

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PUM

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Abstract

The invention relates to a semiconductor structure and a formation method thereof. The formation method comprises the steps of providing a material layer to be etched; forming patterned core layers onthe material layer to be etched; forming a side wall film on the top and side walls of the core layers and on the material layer to be etched; performing at least one time of top treatment on the side wall film to remove the side wall film higher than the top of the core layers, reserving the side wall film on the side walls of the core layers to serve as a first portion of a side wall layer, reserving the side wall film on the material layer to be etched to serve as a second portion of the side wall layer, wherein the top treatment comprises the steps of forming a sacrificial layer coveringthe surface of the side wall film on the side walls and the top of the core layers on the side wall film, removing the sacrificial layer higher than the top of the core layers and part or all thickness of the side wall film and removing the remaining sacrificial layer; removing the core layers; and removing the second portion of the side wall layer after the core layers are removed. The first portion of the side wall layer is symmetrical in shape, and a target pattern with the shape being good can be obtained by etching the material layer to be etched by taking the first portion of the side wall layer as a mask.

Description

technical field [0001] The present invention relates to the field of semiconductors, and in particular, to a semiconductor structure and a method for forming the same. Background technique [0002] Semiconductor technology continues to move toward smaller process nodes, driven by Moore's Law. With the continuous advancement of semiconductor technology, the functions of devices are constantly becoming stronger, but the difficulty of semiconductor manufacturing is also increasing day by day. Lithography is the most critical production technology in the semiconductor manufacturing process. With the continuous reduction of semiconductor process nodes, the existing light source lithography technology has been unable to meet the needs of semiconductor manufacturing. Extreme ultraviolet lithography technology (EUV), many Beamless mask technology and nanoimprint technology have become research hotspots for next-generation lithography candidates. However, the above-mentioned next-g...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L21/336
CPCH01L29/66795H01L29/785
Inventor 张冬平
Owner SEMICON MFG INT (SHANGHAI) CORP
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