Reconfigurable SIMD Systolic Array Structure, Processor and Electronic Terminal

Abstract

The present invention provides a reconfigurable single instruction multiple data systolic array structure, a processor and an electronic terminal. The single instruction multiple data systolic array structure includes: a plurality of processing units arranged in a systolic array, each processing unit The unit is correspondingly connected with an operand collector, and each of the processing units is connected to the adjacent processing units; a plurality of data output channels are correspondingly arranged at the top of each column of the processing units, and the top of each column is The data output channel is connected to the first processing unit of the corresponding column, and each data output channel is also connected to the processing unit on the far right of each row of the processing unit in a one-to-one correspondence. The invention realizes a reconfigurable, low-energy-consumption processor combined with single instruction stream, multiple data streams (SIMD) and systolic array (Systolic Array). By establishing transmission channels and multi-level storage optimization between adjacent processing units, Get lower energy consumption.

Description

technical field [0001] The invention relates to the technical field of processors, in particular to a reconfigurable single-instruction-multiple-data systolic array structure, a processor and an electronic terminal. Background technique [0002] In the era of big data, there are more and more application scenarios for artificial intelligence systems, and deep convolutional neural networks (CNN) rely on their ability to achieve unprecedented accuracy in object recognition, detection and scene understanding tasks. widely used in the system. They have ultra-high precision, but at the cost of high computational complexity. This complexity comes from the need to process hundreds of filters and channels in high-dimensional convolutions simultaneously, which involves a lot of data movement. Therefore, finding a data stream that supports parallel computation and has low data movement costs is critical to achieve an energy-efficient CNN processing mode without compromising accuracy...

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Problems solved by technology

[0007] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a reconfigurable SIMD systolic array structure, processor and electronic terminal, which are used to solve the problem that the existing systolic array has poor flexibility and cannot be reconfigured. The problem of higher processor access time and energy consumption caused by the structure

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