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Method and system for reducing eDRAM (Embedded Dynamic Random Access Memory) refreshing energy consumption in neural network chip

A technology of neural network and neural network model, which is applied in the field of reducing energy consumption of eDRAM refresh in neural network chips, which can solve the problems of large refresh energy consumption, weakening the energy consumption gain of external storage access, etc., and achieve the effect of reducing refresh energy consumption

Active Publication Date: 2018-10-12
TSINGHUA UNIV
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  • Abstract
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Problems solved by technology

[0004] The invention is used to solve the defect that the eDRAM type neural network chip in the prior art has relatively large refresh energy consumption and weakens the energy consumption benefit brought by the reduction of external storage access

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  • Method and system for reducing eDRAM (Embedded Dynamic Random Access Memory) refreshing energy consumption in neural network chip
  • Method and system for reducing eDRAM (Embedded Dynamic Random Access Memory) refreshing energy consumption in neural network chip

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[0019] In order to make the technical features and effects of the present invention more obvious, the technical solutions of the present invention will be further described below in conjunction with the accompanying drawings. The present invention can also be described or implemented in other different specific examples. The equivalent transformations done within all belong to the protection category of the present invention.

[0020] In the description of this specification, descriptions referring to the terms "an embodiment", "a specific embodiment", "some implementations", "for example" and the like mean specific features, structures, materials described in conjunction with the embodiment or example. Or features are included in at least one embodiment or example of the invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials or charact...

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Abstract

The invention provides a method and system for reducing eDRAM (Embedded Dynamic Random Access Memory) refreshing energy consumption in a neural network chip. The method comprises the steps of trainingan original neural network model, and determining a target neural network model with the maximum fault-tolerant capability, and data hold time of an eDRAM corresponding to the target neural network model; scheduling each layer of the target neural network model, and determining a computing mode of each layer and data survival time of each layer under the lowest computing energy consumption; and setting the target neural network model to be performed on the neural network chip according to the computing model of each layer, for storage subareas of each layer, if effective data is not stored inthe storage subareas or the data survival time of each layer is shorter than the data holder time, not refreshing the storage subareas. According to the method, the unnecessary refreshing operation can be removed to the greatest extent, and the eDRAM refreshing energy consumption in the neural network chip is greatly reduced.

Description

technical field [0001] The invention belongs to the field of neural network chip acceleration, and in particular relates to a method and system for reducing energy consumption of eDRAM refreshing in a neural network chip. Background technique [0002] With the advent of the era of artificial intelligence, intelligent tasks such as image recognition, speech recognition, and natural language processing are ubiquitous in life. Neural networks have achieved world-leading results in such intelligent tasks and are widely used in the industry. For example, Baidu image search, Microsoft speech recognition and Google online translation, etc., are all implemented based on neural networks. Due to its regular calculation and large parallelism, the neural network needs and is especially suitable for using neural network chips to accelerate its calculation. However, due to the large amount of data and the limited internal memory capacity of the chip, a large number of external memory ac...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06N3/063G11C11/406
CPCG06N3/063G11C11/406
Inventor 尹首一涂锋斌吴薇薇刘雷波魏少军
Owner TSINGHUA UNIV
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