Method for detecting flatness of wafer table

Abstract

The invention provides a method for detecting the flatness of a wafer table. The method comprises the steps of putting a selected detection wafer on a standard wafer table and etching a first layer ofnesting graphics; putting the detection wafer etched with the first layer of nesting graphics on an actual wafer table and etching a second layer of nesting graphics; calculating the nesting accuracyof the second layer of nesting graphics relative to the first layer of nesting graphics; and comparing the calculated nesting accuracy with a threshold, and if the nesting accuracy exceeds the threshold, judging that the flatness of the wafer table does not reach a standard value. According to the method for detecting the flatness of the wafer table provided by the invention, the value of the nesting accuracy is calculated and recorded through measuring the nesting accuracy of the wafer, and whether the wafer table needs to be cleaned or not is judged through judging whether the nesting accuracy exceeds the threshold or not. According to the method, the flatness of the wafer table can be detected, so that the probability of a bad wafer caused by the flatness is finally reduced.

Description

technical field [0001] The invention relates to the technical field of integrated circuit manufacturing, in particular to a method for detecting the flatness of a wafer workbench. Background technique [0002] The flatness of the wafer table in the lithography machine directly affects the exposure results. If the flatness is not good, it will lead to poor graphics focus, resulting in defects and yield loss. In the prior art, the abnormality of the flatness of the wafer workbench can be found in time by using the flatness detection element. However, due to the thickness of the glue-coated film on the edge of the wafer, and the settings of edge washing and edge removal, the failure range of the lithography machine is usually defined as 3mm, and a chip with a radius of 150mm is used as an example. The radius is within 14mm, and the failure range is outside 14mm. However, due to factors such as the focus failure range and the size of the flatness test device, it is difficult t...

AI Technical Summary

Problems solved by technology

However, due to factors such as the focus failure range and the size of the flatness test device, it is difficult to detect the flatness of the edge of the wafer table.

Moreover, the edge area of ​​the wafer table is more likely to accumulate particles, because the abnormality of the flatness of the edge of the wafer table cannot be detected in time, which will cause the yield loss of the wafers at the edge of the wafer table

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