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Small heterogeneous processing system based on GPU and FPGA

A processing system and heterogeneous technology, applied in the field of heterogeneous computing, can solve the problems of harsh usage conditions and high power consumption, and achieve the effects of simple development, low power consumption and simple structure

Active Publication Date: 2018-11-13
SHANDONG INST OF AEROSPACE ELECTRONICS TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Commercial GPU is a professional acceleration device for graphics and image processing, with a considerable acceleration ratio, but its power consumption is also relatively high, and the use conditions are relatively harsh

Method used

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  • Small heterogeneous processing system based on GPU and FPGA
  • Small heterogeneous processing system based on GPU and FPGA
  • Small heterogeneous processing system based on GPU and FPGA

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Experimental program
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Embodiment

[0039] Example: according to figure 1 The standard 6U size image processing acceleration board designed and produced according to the architecture diagram of the heterogeneous processing system of the present invention is specifically divided into core hardware selection, hardware design, logic design and driver design.

[0040] 1 core hardware selection

[0041] The cores in the framework of the present invention are two GPU modules and an FPGA module. Here, the XC7V585T FPGA of Virtex7 series of Xilinx Company is selected to build a PCIE switching architecture, and the FPGA has a DDR3 memory of not less than 512MB. The GPU module chooses two high-performance processors Tegra X1 (TX1 for short) from NVDIA, which has a 1T-Flops computing performance Maxwell architecture 256-core GPU, 64-bit quad-core ARM A57 CPU, 4GB LPDDR4 memory on the board, and 16GB eMMC Storage space, running Linux for Tegra system.

[0042] In addition, the Ethernet switch core selects the BCM5389 Gig...

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Abstract

The invention discloses a heterogeneous processing system based on GPU and FPGA. Two GPU SOC modules are connected to an FPGA module by virtue of PCIE X4 and are taken as two PCIE slaves of the FPGA module for performing data interaction; the two GPU SOC modules are connected to the gigabit Ethernet switching module by virtue of an internal Ethernet interface; the FPGA module is connected to a host by virtue of the PCIE X4, so that the two GPU SOC modules realize the data interaction with the host; and the gigabit Ethernet switching module is connected to the host by virtue of a network interface of CPCIE, and gigabit Ethernet data interaction between the two GPU SOC modules and the host is realized. The heterogeneous processing system disclosed by the invention has the characteristics oflow power consumption, strong operational performance, simple structure, flexible design, simplicity in development, cascadable performance and multiple applicable scenes.

Description

technical field [0001] The invention belongs to the technical field of heterogeneous computing, in particular to a small heterogeneous processing system based on GPU and FPGA. Background technique [0002] With the continuous development of electronic technology and information technology, the amount of data that the processor needs to process is increasing, which poses an increasing challenge to the system's processing capacity. The existing processing system can no longer meet the current task requirements, and urgent research is needed. The new high-performance data processing system cooperates with the host computer to complete data processing tasks. [0003] As a small heterogeneous data processing system, the data processing accelerator board is to relieve the pressure on the CPU of the industrial computer motherboard to run image processing algorithms, and to complete the data processing acceleration function as a coprocessor of the motherboard CPU. The data processi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/163G06F15/173
CPCG06F15/163G06F15/173
Inventor 申学晋王允森崔伟光胡杨蔡奇安克
Owner SHANDONG INST OF AEROSPACE ELECTRONICS TECH
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