Operation control method suitable for incompletely symmetric multi-processing microcontroller and operating system

An operation-controlled, completely symmetrical technology, applied in electrical digital data processing, instruments, multi-programming devices, etc., can solve problems affecting system execution efficiency, unbalanced load, execution efficiency, and application complexity, etc. Execution efficiency and the effect of reducing complexity

Active Publication Date: 2018-11-20
RES INST OF PHYSICAL & CHEM ENG OF NUCLEAR IND
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] (1) The processors have their own independent memory space [including program space], and the independent memory space of other processors cannot be read and written between processors.
[0004] (2) There is a certain amount of shared memory [including the memory space of peripherals] between processors, but the shared memory space cannot realize implicit write sharing, and a specific processor [privileged processor] must explicitly operate a part of it. The write permission of the memory is assigned to other processors. After the division, if no explicit operation is performed again, other processors only have read access to the memory in this area.
[0005] (3) The shared memory between processors is generally in high memory and cannot be addressed as a stack
[0006] In addition, due to the needs of the application environment, the microcontroller multi-processor also lacks a memory management unit [MMU], and cannot provide support for virtual memory like the application multi-processor.
[0007] The operating systems applicable to embedded systems can only support single-core or standard symmetric multiprocessors. For this kind of non-completely symmetric microcontroller multiprocessor, the existing embedded system can only divide the multi-core into independent The processors are independently controlled by different systems, and it is impossible to coordinate and control multiple cores under a single system
[0008] For multi-core processors, if multiple cores cannot be coordinated and controlled in a single system, but only divided into independent cores to be controlled by different operating systems, the overall execution efficiency of the system and the complexity of applications will be greatly affected. Have a great impact
It is difficult to switch processes between different operating systems, so it is easy to have unbalanced load, which affects the overall execution efficiency of the system
At the same time, because some peripherals may be shared between applications of different systems, the scheduling of drivers will become complicated and cumbersome

Method used

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  • Operation control method suitable for incompletely symmetric multi-processing microcontroller and operating system
  • Operation control method suitable for incompletely symmetric multi-processing microcontroller and operating system
  • Operation control method suitable for incompletely symmetric multi-processing microcontroller and operating system

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Embodiment Construction

[0038]In order to enable those skilled in the art to better understand the solution of the present invention, the technical solution of the present invention will be further described below in conjunction with specific examples.

[0039] Because the micro-control multiprocessor is not completely symmetrical between its various processors, the distribution of the memory is controlled by the privileged processor, so in the operating system of the present invention, the privileged processor [generally processor 0] is responsible for multiple Process scheduling and resource allocation between processors. Other non-privileged processors only handle process scheduling and resource allocation within a single processor. In particular, privileged processors also manage processes and resources within their own processors. Data is exchanged between multiple processors through Inter-Core Communication [IPC].

[0040] The embedded operating system suitable for incomplete symmetric multi-pr...

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Abstract

The invention discloses an operation control method suitable for an incompletely symmetric multi-processing microcontroller and an operating system. According to the operation control method, a privilege processor is responsible for process scheduling and resource allocation among multiple processors, all the processors process process scheduling and resource allocation within a single processor,and the multiple processors carry out data exchange through inter-core communication IPC. An embedded operating system comprises the functions of task scheduling, driver management and application tool chains, through a process manager, a driver manager and a compiler linker of an application of the invention, the goal of the coordinated control of multiple processing cores under a single system is achieved, thereby the system execution efficiency is improved, and the complexity of application design is reduced.

Description

technical field [0001] The invention belongs to the technical field of embedded operating systems, and in particular relates to an operation control method suitable for incompletely symmetrical multi-processing microcontrollers. Background technique [0002] Generally speaking, the microcontroller platform is mainly based on single-core processors, but with the enhancement of semiconductor technology and technology improvement, more and more microcontrollers adopt multi-core design, such as Ti's F28377D and F28379D Wait. These multi-processors for microcontrollers are different from common symmetric multi-processors [such as application multi-processors], and the cores of each processor are not completely symmetrical, mainly in: [0003] (1) Each processor has its own independent memory space [including program space], and processors cannot read and write to access the independent memory space of other processors. [0004] (2) There is a certain amount of shared memory [in...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/163G06F9/48G06F9/50
CPCG06F9/48G06F9/50G06F15/163
Inventor 赵楠王晨薇彭树文高亚男赵武玲魏振姚广任祥正
Owner RES INST OF PHYSICAL & CHEM ENG OF NUCLEAR IND
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