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Method for manufacturing a y-gate transistor device and the transistor device

A device manufacturing method and transistor technology, which are applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of Y-gate semiconductor manufacturing steps, etc., and achieve the goals of increasing cross-sectional area, improving efficiency, and reducing costs Effect

Active Publication Date: 2019-10-08
福建省福联集成电路有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] For this reason, it is necessary to provide a Y-gate transistor device manufacturing method and a transistor device to solve the problem of many manufacturing steps of the existing Y-gate semiconductor

Method used

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  • Method for manufacturing a y-gate transistor device and the transistor device
  • Method for manufacturing a y-gate transistor device and the transistor device
  • Method for manufacturing a y-gate transistor device and the transistor device

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Embodiment Construction

[0035] In order to explain in detail the technical content, structural features, achieved goals and effects of the technical solution, the following will be described in detail in conjunction with specific embodiments and accompanying drawings.

[0036] First, explain the English nouns that may appear:

[0037] 1. YGB: Y-Gate Bottom, Y-gate bottom photolithography process;

[0038] 2. YGT: Y-Gate Top, Y-gate top photolithography process;

[0039] 3.YGD: Y-Gate Deposition, Y gate metallization deposition process;

[0040] 4. 1PN: 1st Passivation Nitride, the first passivation layer nitride deposition process;

[0041] 5. 1MD: 1st Metal Deposition, the first metal layer deposition process;

[0042] 6. 2PN: 2nd Passivation Nitride, the second passivation layer nitride deposition process;

[0043] 7.PP: Polyimide Passivation, polymer passivation flat layer process;

[0044] 8. 2MD: 2nd Metal Deposition, the second metal layer deposition process;

[0045] 9. 3PN: 3rd Passivat...

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Abstract

The invention discloses a Y-gate transistor device and a manufacturing method thereof. The manufacturing method comprises the steps that an epitaxial wafer with a first metal layer, Y-gate metal, a first nitride layer and a second nitride layer is coated with a polymer layer; exposing and developing are carried out on the polymer layer to form openings in the positions of drain metal, source metaland Y-gate top; and etching is carried out to remove the second nitride layer from the drain metal and the source metal, and to remove the first nitride layer and the second nitride layer from the position of the Y gate. According to the technical scheme, the epitaxial wafer with the Y-gate metal is coated with the polymer layer, and openings are formed in the positions of the drain metal, the source metal and the Y-gate top; and in metal evaporation, the metal layer is evaporated on the top of the first metal layer of the drain metal and the source metal and the Y-gate top simultaneously, sothat the steps of the manufacturing process are reduced, the efficiency is improved, and the cost is lowered.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for manufacturing a Y-gate transistor device and the transistor device. Background technique [0002] The production process of the Y gate transistor device before the improvement of the present invention is as follows figure 1 As shown, generally go through the following processes: epitaxial wafer surface treatment and device source / drain metallization process - Y gate bottom photolithography process - Y gate top photolithography process - Y gate metallization deposition process - the first A passivation layer nitride deposition process - the first metal layer deposition process - the second passivation layer nitride deposition process - polymer passivation flat layer process - the second metal layer deposition process - the third passivation Layer nitride deposition process, etc. In order to improve the conductivity at the Y gate, since the length...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L21/28H01L29/78H01L29/423H01L29/417
Inventor 吴淑芳许孟凯陈智广陈胜男林伟铭林张鸿林豪詹智梅
Owner 福建省福联集成电路有限公司