3D storage device and manufacturing method thereof

Abstract

The present invention discloses a 3D storage device and a manufacturing method thereof. The 3D storage device comprises: a substrate; a first laminated structure and a second laminated structure whichare stacked above the substrate, wherein each of the first laminated structure and the second laminated structure comprises a plurality of gate conductors and a plurality of interlayer insulation layers; and a plurality of channel columns penetrating the first laminated structure and the second laminated structure, wherein the channel columns of the first laminated structure communicate with thechannel columns of the second laminated structure, a channel window is formed at the connection position, and the size of the channel window can be changed. The number of the layers of the upper and lower layers of the laminated structures in the 3D storage device are different to increase the opening sizes of the channel columns at the connection of the upper and lower layers of the laminated structures and obtain a larger space in the later punching process so as to reduce or avoid the formation of the source of leaks due to damaging of the channel columns at the connection position, ensurethe continuity of the channel layers and improve the yield and the reliability of the 3D storage device.

Description

technical field [0001] The present invention relates to memory technology, and more particularly, to 3D memory devices and manufacturing methods thereof. Background technique [0002] The improvement of the storage density of the memory device is closely related to the progress of the semiconductor manufacturing process. As the feature size of the semiconductor manufacturing process becomes smaller and smaller, the storage density of the memory device becomes higher and higher. In order to further increase storage density, memory devices with a three-dimensional structure (ie, 3D memory devices) have been developed. A 3D memory device includes a plurality of memory cells stacked in a vertical direction, which can double the integration level on a wafer per unit area and reduce the cost. [0003] Existing 3D memory devices are mainly used as non-volatile flash memory. The two main non-volatile flash memory technologies use NAND and NOR structures, respectively. Compared w...

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Problems solved by technology

For a stacked structure with a high number of layers, it is difficult to form channel pillars, so it is realized by stacking two or more stacked structures, but this will also cause the channel pillars of the upp

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