Frequency synthesizer

Abstract

A frequency synthesizer is provided, containing a constant-temperature crystal oscillator, a single-chip microcomputer, two DDS frequency synthesizers, two buffer amplifiers and a filter, an output end of the constant-temperature crystal oscillator is electrically connected to an input end of the first buffer amplifier, an output end of the first buffer amplifier is electrically connected to inputends of the first DDS frequency synthesizer and the second DDS frequency synthesizer, respectively. An output end of the first DDS frequency synthesizer is electrically connected to an input end of the filter. The output end of the filter outputs a local oscillator signal, the output end of the second DDS frequency synthesizer is connected with the input end of the second buffer amplifier, the output end of the second buffer amplifier outputs a back-stage clock signal, and the single-chip microcomputer is electrically connected with the first DDS frequency synthesizer and the second DDS frequency synthesizer separately. The RF front-end direct digital frequency synthesizer can simultaneously output a local oscillator signal and provide clock for the rear-stage DSP to meet user needs.

Description

technical field [0001] The invention relates to the field of digital frequency synthesizers, in particular to a frequency synthesizer. Background technique [0002] In the prior art, the block diagram of direct digital frequency synthesizer is as follows figure 1 As shown, it includes five parts: phase accumulator, waveform memory, digital-to-analog converter, low-pass filter and reference clock. The clock circuit is generated by a highly stable crystal oscillator, which is used to provide synchronous work of various components in the DDS. The phase accumulator is composed of a bit adder and a bit phase register, which is used to realize phase accumulation and store the accumulation result. The waveform memory is composed of ROM or RAM. The stored data is the binary digital sine amplitude corresponding to each phase. In each clock cycle, the high M bits of the output sequence of the phase accumulator address it, and the final output is the binary sine amplitude sequence c...

AI Technical Summary

Problems solved by technology

However, the existing direct digital frequency synthesizer can only generate continuously changing waveforms of the desired frequency but cannot provide a clock signal for the subsequent DSP

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