Efficient double-frequency J-kind stack power amplifier based on second harmonics control

Abstract

The invention discloses an efficient double-frequency J-kind stack power amplifier based on second harmonics control. The amplifier comprises an input double-frequency control network, a four stackingautomatic biasing power amplification network, an output second harmonics double-frequency J-kind control network, a grid power supplying biasing network and a drain electrode power supplying biasingnetwork. The amplifier adopts a four stacking transistor structure based on an automatic biasing structure, and the second harmonics double-frequency J-kind control network is combined, so that a circuit has the output capacity of high efficiency, high gain, high power and high linearity of a double-frequency section.

Description

technical field [0001] The invention belongs to the technical field of field effect transistor radio frequency power amplifiers and integrated circuits, and in particular relates to the design of a high-efficiency dual-frequency class J stack power amplifier based on second harmonic control. Background technique [0002] With the development of modern military and civilian communication technologies, RF front-end transmitters are also developing in the direction of dual-band or even multi-frequency modes, high efficiency, high gain, and high power output. Therefore, the market urgently needs a power amplifier with high efficiency, high gain, and high power in a dual-band working mode. However, in the design of traditional high-efficiency power amplifiers, there have always been some design problems, mainly reflected in the dual-band operating mode and the mutual restriction of high-efficiency indicators: in order to ensure the high-efficiency operation of the amplifier, the ...

AI Technical Summary

Problems solved by technology

However, in the design of traditional high-efficiency power amplifiers, there have always been some design problems, mainly reflected in the dual-band operating mode and the mutual restriction of high-efficiency indicators: in order to ensure the high-efficiency operation of the amplifier, the transistor must work in the overdrive mode, similar to In the switch state, but the realization of dual-frequency overdrive switching power amplifier has always been the technical bottleneck of circuit realization

[0003] There are many circuit structures of common high-efficiency power amplifiers, the most typical ones are traditional class AB, class C, switching type power amplifiers of class D, class E, and class F, etc. However, these high-efficiency amplifiers still have some shortcomings, mainly reflected in In: The theoretical limit efficiency of the traditional class AB amplifier is 78.5%, which is relatively low, and it is often necessary to sacrifice the output insertion loss and efficiency to increase the bandwidth of the amplifier; the limit efficiency of the class C amplifier is 100%, but the power output capability is low; the switching type D Class, E, and F power amplifiers need to rely on precise harmonic impedance control, or strict impedance matching conditions, these controls and conditions greatly limit the working mode of the amplifier, especially the dual-band design application

In addition, the existing high-efficiency FET power amplifiers are often implemented based on a single common-source transistor, which is limited by a single transistor, and the power output capability and power gain capability are relatively low

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