3D storage device and manufacturing method thereof

Abstract

The present invention discloses a 3D storage device and a manufacturing method thereof. The 3D storage module comprises: a semiconductor substrate; a gate stack structure located on the semiconductorsubstrate and comprising a plurality of gate conductor layers and a plurality of interlayer insulation layers which are alternately stacked; a plurality of channel columns penetrating the gate stack structure and connected with the semiconductor substrate; and a first electrical connection structure located on the channel columns and connected with a bit line. The 3D storage device further comprises a plurality of conductive columns and a second electrical connection structure located on the conductive columns, the plurality of conductive columns penetrate the gate stack structure, are electrically connected with the semiconductor substrate and are distributed among the channel columns, each conductive column is configured to supply power to the channel columns around the conductive columnthrough the semiconductor substrate, and the second electrical connection structure located at the same line as the conductive column is connected with the same source line, and is staggered with thefirst electrical connection structure located the same line as the second electrical connection structure in the first direction.

Description

technical field [0001] The present invention relates to memory technology, and more specifically, to a 3D memory device and a manufacturing method thereof. Background technique [0002] The improvement of the storage density of the memory device is closely related to the progress of the semiconductor manufacturing process. As the feature size of the semiconductor manufacturing process becomes smaller and smaller, the storage density of the memory device becomes higher and higher. In order to further increase storage density, memory devices with a three-dimensional structure (ie, 3D memory devices) have been developed. A 3D memory device includes a plurality of memory cells stacked in a vertical direction, which can double the integration level on a wafer per unit area and reduce the cost. [0003] Existing 3D memory devices are mainly used as non-volatile flash memory. The two main non-volatile flash memory technologies use NAND and NOR structures, respectively. Compared...

AI Technical Summary

Problems solved by technology

However, in a 3D memory device, the conductive channel only supplies power to the channel pillars on both sides of it, so it is necessary to form a plurality of gate line spacers first, and then fill the gate line spacers to form a conductive channel after forming the channel columns. The process is complicated, and the conductive channel needs to occupy a large amount of space in the 3D memory device. In addition, because the conductive channel needs to fill the entire gate line spacer, not only is it difficult to control the warpage of the wafer, but also more consumables and higher costs

Images