SiC MOSFET gate oxide layer annealing method

Abstract

The invention relates to a SiC MOSFET gate oxide layer annealing method. The annealing method comprises the steps of preparing a SiC epitaxial wafer; growing a SiO2 gate oxide layer on the SiC epitaxial wafer; and carrying out annealing treatment on the SiO2 gate oxide layer under the condition of a SiH2Cl2 gas environment. SiH2Cl2 is adopted to perform annealing on a SiC MOSFET device, so that the reverse channel carrier mobility of the SiC MOSFET device is improved, and the performance of the SiC MOSFET device is improved.

Description

technical field [0001] The invention belongs to the field of SiC MOSFET devices, and in particular relates to an annealing method for a SiC MOSFET gate oxide layer. Background technique [0002] As a third-generation semiconductor material, SiC has the advantages of wide band gap, high thermal conductivity, and high breakdown field strength, and is suitable for making high-temperature, high-power, high-temperature, high-frequency, and radiation-resistant devices. Therefore, SiC is widely used in a semiconductor field effect transistor (Metal-oxide Semiconductor Field Effect Transistor, MOSFET for short). [0003] In SiC MOSFET, due to the SiO 2 Lattice mismatch with SiC material, in SiO 2 Gate Oxide SiO 2 A large number of trap charges such as dangling bonds, carbon clusters and oxygen vacancies will be generated in the SiC interface of the interface and the SiC epitaxial wafer, which will affect the performance of SiC MOSFET devices. Currently reduced SiO 2 The way to ...

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Problems solved by technology

[0004] But in SiCMOSFET, in SiO 2 Gate Oxide SiO 2 A large number of trapped charges such as dangling bonds and oxygen vacancies will be generated in the interface and the SiC interface of the SiC epitaxial wafer at the same time, resulting in extremely low carrier mobility in the inversion channel of the SiC MOSFET device and reducing the performance of the device

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