A graphene-based tunneling transistor, inverter and preparation method thereof

A technology of tunneling transistors and graphene, applied in transistors, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve the problems of difficulty in meeting the requirements of response speed of digital logic circuits, low saturation motion speed, etc., to achieve protection quality, improve Overall gain, the effect of prolonging the working life

Active Publication Date: 2021-09-28
SOUTHEAST UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The existing CMOS inverter circuit consists of two enhanced MOS field effect transistors, such as figure 1 As shown, because the saturation movement speed of electrons in silicon is not high, it is difficult to meet the requirements of digital logic circuits for response speed in high-frequency operating mode

Method used

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  • A graphene-based tunneling transistor, inverter and preparation method thereof
  • A graphene-based tunneling transistor, inverter and preparation method thereof
  • A graphene-based tunneling transistor, inverter and preparation method thereof

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Embodiment Construction

[0030] Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals designate the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary only for explaining the present invention and should not be construed as limiting the present invention.

[0031] Those skilled in the art will understand that unless otherwise stated, the singular forms "a", "an", "said" and "the" used herein may also include plural forms. It should be further understood that the word "comprising" used in the description of the present invention refers to the presence of said features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, Integers, steps, operations, elements, components, and / or groups thereof. It will be unders...

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Abstract

The invention discloses a graphene-based tunneling transistor, an inverter and a preparation method thereof. The graphene tunneling transistor includes a source, a gate, a drain, a graphene film, a semiconductor or metal substrate, and a tunneling layer , drain insulating layer, gate insulating layer, graphene passivation layer and DC bias voltage source; the source electrode is connected to the silicon substrate, the drain electrode is connected to the graphene film, and there is a layer of tunneling between the graphene and the substrate layer, the gate is on top of the electron tunneling section. If the work function of the semiconductor or metal substrate is small, the metal with a large work function is selected for the drain, and the device is n-type; otherwise, the metal with a large work function is used for the drain, and the device is p-type. The drain of the p-type tube is connected to a high potential, and the source of the n-type tube is connected to a low potential. A novel graphene tunneling transistor structure realizes a digital logic inverter with high response rate and low static power consumption.

Description

technical field [0001] The invention relates to an inverter and a preparation method thereof, in particular to a graphene-based tunneling transistor inverter and a preparation method thereof, and belongs to the technical field of electronic device preparation. Background technique [0002] An inverter is an electronic device that can reverse the phase of an input signal, and is widely used in analog circuits, such as audio amplifier circuits, clock oscillators, etc. The existing CMOS inverter circuit consists of two enhanced MOS field effect transistors, such as figure 1 As shown, because the saturation movement speed of electrons in silicon is not high, it is difficult to meet the requirements of digital logic circuits for response speed in high-frequency operating mode. Contents of the invention [0003] In view of the above problems, the present invention provides a graphene-based tunneling transistor inverter with fast response and high gain and a preparation method t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/739H01L29/16H01L29/06H01L27/082H01L21/8222H01L21/331
CPCH01L21/8222H01L27/082H01L29/0653H01L29/1606H01L29/66356H01L29/7391
Inventor 王琦龙杨文鑫徐季翟雨生张晓兵
Owner SOUTHEAST UNIV
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