3results about How to "No additional process steps required" patented technology

The invention discloses a method for improving a charge effect defect of a compound substrate photoetching process, and belongs to the technical field of integrated circuits. The method comprises the following steps: (1) spraying a developing solution: placing a wafer on a developing unit bearing table, swinging from one side edge of the wafer to the other side edge by using an H-shaped nozzle, and spraying the developing solution; wherein the rotating speed of the wafer is continuously changed between 100 rpm and 1000 rpm; (2) spraying deionized water: swinging from the edge of one side of the wafer to the edge of the other side of the wafer by using a columnar nozzle, and spraying the deionized water to carry out development reactant replacement; wherein the rotating speed of the wafer is set as follows: high speed, low speed and high speed, and the deionized water can more sufficiently replace the developing reactants through variable-speed rotation of the wafer, so that a more sufficient cleaning effect is achieved; and (3) spin-drying: spin-drying the wafer in a manner of rotating at a high speed and then rotating at a low speed. According to the method, the charge generation amount can be reduced to the greatest extent, so that the charge effect of the compound substrate wafer is thoroughly solved.

The application relates to the technical field of image sensors, and provides an image sensor and a manufacturing method.The image sensor comprises a semiconductor substrate, a plurality of pixel regions, a metal interconnection layer and a blocking structure.The blocking structure is composed of an isolation structure arranged in the semiconductor substrate, a crosstalk modulation structure and a first contact hole structure which are sequentially arranged in a dielectric layer and correspond to the isolation structure.The blocking structure can form an effective light blocking wall structure on one hand, preventing light of one pixel region from being reflected by the metal interconnection layer and crosstalking into an adjacent pixel region; and on the other hand, the blocking structure can prevent over-etching of the isolation structure during processing of the first contact hole structure, thereby reducing the enrichment and diffusion of charges in the isolation structure, effectively improving the dark current performance of the device, and simultaneously reducing optical crosstalk and electrical crosstalk of the image sensor, which is conducive to improving the imaging quality of the image sensor.

The invention provides a shield gate trench MOSFET device and a preparation method thereof, a first contact hole and a second contact hole which are strip-shaped, continuous, alternately arranged and different in transverse width are formed in an interlayer dielectric layer, the transverse width of the second contact hole is larger than that of the first contact hole, and the first contact hole and the second contact hole are communicated with each other. The ion concentration of the channel region of the cell where the second contact hole is located is relatively high, so that the threshold voltage is relatively high; the channel ion concentration of the cell where the first contact hole is located is low, so that the threshold voltage is low, when the MOS device works, the channel of the cell with the low threshold voltage is firstly started for conduction, the channel of the cell with the high threshold voltage is then started for conduction, the cell which is started later can serve as a heat dissipation channel through the time-sharing starting mechanism, heat is dissipated for the cell which is started firstly, and the heat dissipation efficiency is improved. Therefore, the SOA and the heat dissipation capability of the device are remarkably improved, only the shape of the contact hole mask layout needs to be adjusted, additional process steps do not need to be added, the reliability of the MOS device is improved, and the application range of the MOS device is widened with extremely low cost.