A time sequence repairing method based on time headroom

Abstract

The invention provides a time sequence repairing method based on time headroom, which comprises the following steps: step 1, extracting netlist information of all paths in a chip layout, and then entering a step 2; Step 2, determining a time sequence violation path in the generated static time sequence analysis and a corresponding time margin based on the configured time sequence constraint condition, and then entering a step 3; Step 3, judging whether the time margin is greater than a preset threshold value or not, if so, determining a starting point or an end point of a preset analysis pathin the time sequence violation path, and adjusting the magnitude of the clock delay of the time sequence violation path; Otherwise, analyzing based on the static time sequence; The method comprises the following steps: firstly, extracting logic units on a data path and a clock path according to a preset time sequence violation path, further extracting logic modules connected with the time sequenceviolation path and line network information of the logic modules, adjusting the line length between the logic modules connected with the time sequence violation path, performing optimized layout according to the optimized line length, and then returning to the step 1. The design area of the chip is reduced, and the working frequency of the chip is improved.

Description

technical field

[0001] The invention relates to the field of automatic wiring of integrated circuit layouts, in particular to a time sequence repair method based on time margin. Background technique

[0002] In the design of integrated circuit chips, there are several main factors that determine the operating speed and design area of ​​integrated circuit chips: production technology, code writing style, physical implementation process from code to layout, etc. Fixing timing is one of the most important critical steps in the code-to-layout physical implementation process. In the traditional implementation method, the processing of timing repair is generally aimed at the data path, such as increasing the size of the device on the data path to increase its driving capability, or inserting a buffer at a node with a heavy fan-out burden to reduce each node. Fan-out burden and so on. No matter which of the above implementation methods will increase the area of ​​the chip, even i...

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