Semiconductor package device including stacked antenna structure

Abstract

The present invention relates to a semiconductor package device including a stacked antenna structure with a high-k laminated dielectric layer separating antenna and ground planes, and a method of manufacturing the structure. A semiconductor die is laterally encapsulated within an insulating structure comprising a first redistributions structure. A second redistribution structure is disposed overand electrically coupled to the first redistribution structure and the die. The second redistribution structure includes the stacked antenna structure which includes first and second conductive planesseparated by a high dielectric constant laminated dielectric structure. The first conductive plane includes openings and the second conductive plane is configured to transmit and receive electromagnetic waves through the openings in the first conductive plane.

Description

technical field [0001] Embodiments of the present invention relate to a semiconductor packaging device including a stacked dielectric structure. Background technique [0002] Many modern electronic devices include integrated chips that communicate wirelessly with other electronic devices using antennas. Integrated chips can use conventional off-chip antennas or on-chip integrated antennas. An off-chip antenna is an external component connected to an integrated chip. On-chip integrated antennas are miniaturized and built within the integrated chip itself. For example, integrated antennas such as thin-film microstrip antennas or patch antennas for high-frequency wireless communication devices often use planar antenna arrays disposed on high-frequency substrates or high-frequency printed circuit boards. [0003] Over the past decade, the demand for wireless communication in handheld devices (including tablet PCs and smart phones) and consumer-related devices (such as navigat...

AI Technical Summary

Problems solved by technology

Therefore, in modern devices, antennas implemented with off-chip components may not be advantageous due to the large area of ​​the off-chip components, and may also have poor performance due to impedance mismatch between the integrated chip and the antenna

In addition, existing on-chip antennas are not only smaller than their off-chip counterparts, but may also exceed expectations in meeting today's demands on portable electronics

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