Wafer-level light sensing system-level packaging structure and manufacturing method thereof

A system-level packaging and wafer-level technology, applied in semiconductor/solid-state device manufacturing, electrical components, electric solid-state devices, etc., can solve problems such as high packaging cost, large package size, and inflexible packaging structure design

Active Publication Date: 2019-04-05
NAT CENT FOR ADVANCED PACKAGING
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] Aiming at the problems of inflexible package design, large package size, and high package cost caused by the traditional photoelectric sensor package structure, according to an embodiment of the present invention, a wafer-level light-sensing system-level package structure is provided, including:

Method used

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  • Wafer-level light sensing system-level packaging structure and manufacturing method thereof
  • Wafer-level light sensing system-level packaging structure and manufacturing method thereof
  • Wafer-level light sensing system-level packaging structure and manufacturing method thereof

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Embodiment Construction

[0052] In the following description, the present invention is described with reference to various examples. One skilled in the art will recognize, however, that the various embodiments may be practiced without one or more of the specific details, or with other alternative and / or additional methods, materials, or components. In other instances, well-known structures, materials, or operations are not shown or described in detail so as not to obscure aspects of the various embodiments of the invention. Similarly, for purposes of explanation, specific quantities, materials and configurations are set forth in order to provide a thorough understanding of embodiments of the invention. However, the invention may be practiced without these specific details. Furthermore, it should be understood that the various embodiments shown in the drawings are illustrative representations and are not necessarily drawn to scale.

[0053]In this specification, reference to "one embodiment" or "the ...

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PUM

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Abstract

The invention discloses a wafer-level light sensing system-level packaging structure comprising: a first silicon substrate; a second silicon substrate disposed above the first silicon substrate and having a cavity structure penetrating through the top surface and the bottom surface of the second silicon substrate; a third silicon substrate disposed above the second silicon substrate and having a light sensing through hole; a photosensitive chip mounted on the front surface of the first silicon substrate in a corresponding region in the cavity structure, and aligned with the light sensing through hole; a flip-chip soldered on the front surface of the first silicon substrate in another corresponding region in the cavity structure; and an external solder ball.

Description

technical field [0001] The invention relates to the technical field of semiconductor packaging, in particular to a packaging structure of a wafer-level photosensitive system and a manufacturing method thereof. Background technique [0002] Wafer-level chip packaging technology is a technology that performs packaging and testing on the entire wafer and then cuts it to obtain a single finished chip. The size of the packaged chip is the same as that of the bare chip. Wafer-level chip packaging technology is a technology that can integrate IC design, wafer manufacturing, packaging testing, and basic board manufacturing. It is a hot spot in the current packaging field and a future development trend. The difference between wafer-level chip packaging technology and traditional packaging methods is that traditional chip packaging is cut first and then packaged and tested, and after packaging, the size of the original chip is increased by about 20%; Packaging and testing are carried...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L25/16H01L23/48H01L21/50
CPCH01L21/50H01L23/481H01L25/167H01L2224/16225H01L2224/73204H01L2224/73253
Inventor 徐健
Owner NAT CENT FOR ADVANCED PACKAGING
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