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A kind of iterative error control method and device for NAND flash memory data

A flash memory and iterative technology, applied in the direction of electrical digital data processing, error detection/correction, generation of response errors, etc., can solve problems such as the inaccuracy of calling models, and achieve strong anti-error ability, adaptive charge distribution changes, Soft values ​​for precise and reliable results

Active Publication Date: 2020-09-25
SOUTHWEST JIAOTONG UNIV
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Problems solved by technology

However, this method obtains the parameters of the probability distribution of the threshold voltage in advance through statistical analysis, forms a lookup table and stores it in the NAND controller, and calls it for decoding at different times and times of reading and writing. There are also inaccuracies in the differences between memory individuals, call times, and call models

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  • A kind of iterative error control method and device for NAND flash memory data
  • A kind of iterative error control method and device for NAND flash memory data

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[0037] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and examples.

[0038] figure 1 It is a schematic flowchart of an iterative error control method for NAND flash memory data in an embodiment of the present invention. Such as figure 1 As shown, the iterative error control method for NAND flash memory data in the embodiment of the present invention comprises:

[0039] In step 101, the read-write controller reads the threshold voltage values ​​of each unit in the NAND flash memory through a preset reference voltage.

[0040] In this step, after the read-write controller (for example, the read-write controller of the solid state disk SSD) receives the read request, the read-write controller can set the threshold voltage value of each unit in the NAND flash memory through the preset reference voltage Read to obtain the th...

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Abstract

The invention discloses an iterative error control method and device for NAND flash memory data, wherein the device includes: a read-write controller, an iterative decoder and a probability density function estimator. By using the above-mentioned iterative error control method and device for NAND flash memory data, the iterative error of NAND flash memory data can be effectively controlled, and more accurate decoding results can be obtained.

Description

technical field [0001] The invention relates to error control technology in memory, in particular to an iterative error control method and device for NAND flash memory data. Background technique [0002] With the development of electronic technology, more and more memory cells are accommodated per unit area, and the distance between cells is getting smaller and smaller, which also leads to an increase in error rate. [0003] NAND flash memory (NAND Flash) is a non-volatile random access storage medium that has developed rapidly in recent years. The code errors in NAND flash memory are mainly caused by aging caused by the increase in the number of erasing and writing, adjacent unit write interference, and long-term storage. It is caused by effects such as charge loss and read operation distribution. The increase in error rate also greatly reduces the service life of NAND flash memory, for example, when all error control methods cannot guarantee 10 -15 In the case of a bit e...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/10
CPCG06F11/1068
Inventor 马征
Owner SOUTHWEST JIAOTONG UNIV
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