Method of forming alignment marks

Abstract

The present invention provides a method for forming an alignment mark, comprising: forming a plurality of first metal connection pillars and at least one second metal connection pillar on a substrate; forming a patterned oxide layer of a first alignment region and The patterned oxide layer and the first oxide connection pillar in the second alignment region; forming the third metal connection pillar on the first oxide connection pillar and the oxide layer on the second alignment region For the fourth metal connection pillar, the ratio of the distance between the upper surface of the third metal connection pillar to the surface of the patterned oxide layer in the first alignment region and the distance between adjacent third metal connection pillars is greater than 1:1 ; A second oxide layer is formed on the patterned oxide layer, the third metal connecting pillar and the fourth connecting pillar, and grooves are formed on the surface of the second oxide layer as alignment marks. Compared with the prior art, the present application directly forms the alignment marks while forming the MEMS and CMOS interconnect layers, which can save materials and time.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming an alignment mark. Background technique [0002] CMOS is a part of the digital circuit. Micro-Electro-Mechanical System (MEMS) is an industrial technology that integrates microelectronics technology and mechanical engineering. The microelectromechanical system (AMR MEMS) manufactured by the resistance (AMR) effect has high sensitivity, good thermal stability, low material cost, and simple preparation process, and has been widely used. Now it is possible that MEMS and CMOS will be combined, so it involves The interconnection of MEMS and CMOS, and the interconnection requires alignment marks as an aid. [0003] In the prior art, there are two methods to form alignment marks for MEMS and CMOS interconnection. The first method is that CMOS itself is divided into multiple layers, and each layer has alignment marks. If MEMS is formed on the pla...

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Problems solved by technology

[0004] However, in the first method of the prior art, it is necessary to add an additional layer of through holes and a layer of metal, and at the same time form the alignment marks of the subsequent layers. In the second method, it is necessary to add a non-etching layer, open CMOS alignment marks, and these two methods require additional processes to form MEMS and CMOS interconnection alignment marks, wasting cost and time

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