An ultra-low power successive approximation analog-to-digital converter based on charge redistribution

Abstract

The invention relates to an ultra-low power consumption successive approximation type analog-to-digital converter based on charge redistribution. The analog-to-digital converter comprises a comparator, a first control logic unit, a second control logic unit, a bootstrap switch K1, a bootstrap switch K2, a first capacitor bank, a second capacitor bank, a third capacitor bank, a fourth capacitor bank and a reference voltage end. According to the invention, the second capacitor bank and the fourth capacitor bank are connected to the two ends of the comparator after the first switching is completed; no power consumption is generated in the first switching process; the voltage is redistributed; the switching process of other digits is completed; reducing power consumption, a binary structure capacitor is adopted; the bridge capacitor is a unit capacitor, so that the problem when the bridge capacitor is a fractional capacitor is avoided, the switching time sequence is realized by three potentials of the power supply voltage Vref, the common-mode voltage Vcm and the ground voltage GND, the number of capacitors is further reduced, the precision is improved, and the time sequence power consumption is reduced by more than 99% compared with the traditional time sequence.

Description

technical field [0001] The invention belongs to the field of digital-analog hybrid integrated circuit design, in particular to an ultra-low power consumption successive approximation analog-to-digital converter based on charge redistribution. Background technique [0002] Successive approximation analog-to-digital converter (SAR ADC, successive approximation register Analog to Digital), in each conversion process, by traversing all quantized values ​​and converting them into analog values, comparing the input signal with it one by one, and finally getting the desired output digital signal. Due to the advantages of simple structure and low power consumption of successive approximation analog-to-digital converters, successive approximation analog-to-digital converters are widely used in fields with low power consumption requirements such as wearable devices and medical devices. [0003] Currently, capacitor arrays based on charge redistribution are widely used in SAR ADCs bec...

AI Technical Summary

Problems solved by technology

With the development of the technology, the power consumption of the transistor circuit is getting lower and lower. In contrast, the sampling and switching of the capacitor array has become one of the main sources of power consumption of the successive approximation analog-to-digital converter. The traditional successive The approximation analog-to-digital converter will generate large power consumption, and the number of capacitors used will be too large, which will occupy a large chip area. Part of the research is only aimed at low power consumption, large number of capacitors, leading to increased chip costs and other issues

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